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Rev. Time Author
fa0e842 h8300 2020-04-05 22:52:16 Yoshinori Sato

fix _end address.

af38cd9 2020-04-05 22:51:51 Yoshinori Sato

fix stdout path

70e97fd 2020-04-05 22:51:20 Yoshinori Sato

Fix build error.

4d446a8 2019-11-18 23:21:58 Yoshinori Sato

update configuration.

f654ac9 2019-11-18 23:21:26 Yoshinori Sato

Add dtb entry

e3564a8 2019-11-18 23:20:36 Yoshinori Sato

Fix target name.

b5288e9 2019-11-18 23:19:47 Yoshinori Sato

Fix SCI only MCU

edd5556 2019-11-18 23:17:20 Yoshinori Sato

nvedit.c: fix build error.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

e8f23fa 2019-11-18 23:13:09 Yoshinori Sato

Add renesas 8bit timer driver.

5680bec 2019-11-18 23:08:36 Yoshinori Sato

Remove old timer functions.

55e5108 2019-11-18 23:05:21 Yoshinori Sato

lan91c96: Fix build error of DM.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

4562731 2019-11-13 18:15:15 Yoshinori Sato

Merge branch 'master' into h8300

3ff1ff3 2019-11-13 03:40:58 Tom Rini

Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'

- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This
is size neutral outside of two platforms with latent bugs being fixed
now and they no longer have "ENV_IS_NOWHERE" set along with their
intended location.

cb6617a 2019-11-13 01:08:00 Tom Rini

defconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENT

Move this symbol to Kconfig. As part of this we can drop a UBI-specific
symbol that was a stop-gap for not having this particular symbol in
Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>

38d5fa4 2019-11-13 01:08:00 Tom Rini

pfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfig

This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather
than defconfig, fix.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>

ba0afae 2019-11-13 01:08:00 Tom Rini

evb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfig

This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than
defconfig, fix.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

5f7ff6d 2019-11-12 21:18:23 Tom Rini

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling
-----BEGIN PGP SIGNATURE-----

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ZW54LmRlAAoJECjE2NMq1et3oVwL/2Z7kCMCjudXNjXqJFSVsCizuzaxkYvUDQCK
g8+P7pdci/xZz8pVvVD5zmpZGRM2hu+7hFQwIlSu7anlRqdW+9cZCAJoeq/4A29c
TkI3w99R0xTDGFlip0zM4vKlQXmC0I0LYbJPVDLjN+zNkhL6QNS3QptONw/3xPzr
Vj5+eztasl5JOnkTFE8yZkfbkekgPbO4h43oje5XwRdRQcwzo4qEFZcxZzvucz39
0RXyvu5qtXvSeVYApXeYcnBD3Mn4rjq26rfn2EEntkO0FbhYBHBjwx3/ozmUaOFR
7AtNyZZSAZFe03egfX6+ODx7tuOTA0PK1LLdogMjLDrOd70px+P7wxY9QZV6hKw9
TC4YlboZK2bjsPyOwIraTWVUvU9YjQzlPT0SYjyIono33Av1Um7RDvp+XeyG7VPC
AYE6luZwhauYNUaGegFPexDxOSRqeAiTLx3kOOeHb4Vb4KkJu4Np7Pma2uiqI00V
4TpWJwhqQPn7lo/N1X9ymBx6iNvt2Q==
=sgCz
-----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling

a965a8b 2019-11-12 11:01:10 Tom Rini

Prepare v2020.01-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>

59e5d1e 2019-11-12 10:04:24 Tom Rini

configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

d6da4da 2019-11-12 04:20:35 Vignesh Rajendran

gitattributes: dont treat non-text files as text

With recent update in u-boot gitattributes all files are treated as regular
text files. This creates problems with special files and repo always
shows uncommitted files like below.

Your branch is up-to-date with 'origin/master'.
Changes not staged for commit:
(use "git add <file>..." to update what will be committed)
(use "git checkout -- <file>..." to discard changes in working directory)

modified: tools/logos/compulab.bmp
modified: tools/logos/denx-comp.bmp
modified: tools/logos/toradex.bmp

To fix above problem special files bmp/ttf files are treated as binary
files in the gitattributes.

Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com>
Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>

d25a2d3 2019-11-12 04:20:35 Michael Trimarchi

.gitignore: Ignore .img files

The generated idbloader.img file that rockchip uses should
be not included in git status report

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>

7c15013 2019-11-12 04:20:35 Simon Glass

binman: tegra: Adjust symbol calculation depending on end-at-4gb

A recent change adjusted the symbol calculation to work on x86 but broke
it for Tegra. In fact this is because they have different needs.

On x86 devices the code is linked to a ROM address and the end-at-4gb
property is used for the image. In this case there is no need to add the
base address of the image, since the base address is already built into
the offset and image-pos properties.

On other devices we must add the base address since the offsets start at
zero.

In addition the base address is currently added to the 'offset' and 'size'
values. It should in fact only be added to 'image-pos', since 'offset' is
relative to its parent and 'size' is not actually an address. This code
should have been adjusted when support for 'image-pos' and 'size' was
added, but it was not.

To correct these problems:
- move the code that handles adding the base address to section.py, which
can check the end-at-4gb property and which property
(offset/size/image-pos) is being read
- add the base address only when needed (only for image-pos and not if the
image uses end-at-4gb)
- add a note to the documentation
- add a separate test to cover x86 behaviour

Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base)

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

086e391 2019-11-12 04:19:32 Tom Rini

Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.

0b73ef0 2019-11-12 04:19:04 Tom Rini

Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC.
- Few bug fixes and updates related to SPI, hwconfig, ethernet,
fsl-layerscape, pci, icid, PSCI

f74a089 2019-11-10 21:40:20 Kever Yang

rockchip: firefly-rk3288: Enable TPL support

This patch enable TPL support for firefly-rk3288 board, which works ths
same way with other RK3288 board like Tinker, evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

2d86ab5 2019-11-10 21:40:20 Levin Du

rockchip: adding the missing "/" in entries of boot_devices

Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work
as expected. When board_boot_order() `spl-boot-order.c` meets
"same-as-spl", it gets the conf by looking the boot_devices table by boot
source, and parse the node by the conf with:

node = fdt_path_offset(blob, conf);

which will failed without the "/" indicating the path.

Currently only entries of boot_devices in rk3399 have the "/" prefix.
Therefore add the missing ones in other boards.

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

6024467 2019-11-10 21:40:20 Kever Yang

rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs

Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to
limit the SPL size in 0x40000(start from 0) so that we don't need to do
the relocate for ATF loading.
Note that there will be separate BSS, STACK and MALLOC heap, so the size
0x40000(256KB) should be enough for SPL text.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

006ab58 2019-11-10 21:40:20 Kever Yang

rockchip: rk3399: update SPL_STACK_R_ADDR

Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config;
default to 0x4000000(64MB) instead of 0x80000(512KB) for this address
can support all the SoCs including those may have only 64MB memory, and
also reserve enough space for atf, kernel(in falcon mode) loading.

After the ATF entry move to 0x40000, the stack from 0x80000 may be override
when loading ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

4b29488 2019-11-10 21:40:20 Kever Yang

rockchip: evb-px5: defconfig: no need to reserve IRAM for SPL

We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.

Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.

The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

ae2500f 2019-11-10 21:40:20 Kever Yang

rockchip: rk3328: defconfig: no need to reserve IRAM for SPL

We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.

Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.

The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>