OSDN -- 오픈 소스 소프트웨어 개발 및 다운로드
Translation Status of 한국말 translation status for ko
  • R/O
  • HTTP
  • SSH
  • HTTPS
Fork

Commit

Tags
No Tags

Frequently used words (click to add to your profile)

javac++androidlinuxc#windowsobjective-ccocoa誰得qtpythonphprubygameguibathyscaphec計画中(planning stage)翻訳omegatframeworktwitterdomtestvb.netdirectxゲームエンジンbtronarduinopreviewer

Commit MetaInfo

Revisionf3dd3184ec1a33122dc9230b0366e1472804be27 (tree)
Time2015-03-24 14:29:31
AuthorYoshinori Sato <ysato@user...>
CommiterYoshinori Sato

Log Message

Add AP-RX64M-0A

Change Summary

Incremental Difference

--- /dev/null
+++ b/board/alphaproject/ap_rx64m_0a/Makefile
@@ -0,0 +1,21 @@
1+#
2+# Copyright (C) 2014 Yoshinori Sato
3+#
4+# u-boot/board/hokuto/HSBRX63NC/Makefile
5+#
6+# This program is free software; you can redistribute it and/or
7+# modify it under the terms of the GNU General Public License as
8+# published by the Free Software Foundation; either version 2 of
9+# the License, or (at your option) any later version.
10+#
11+# This program is distributed in the hope that it will be useful,
12+# but WITHOUT ANY WARRANTY; without even the implied warranty of
13+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+# GNU General Public License for more details.
15+#
16+# You should have received a copy of the GNU General Public License
17+# along with this program; if not, write to the Free Software
18+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19+# MA 02111-1307 USA
20+
21+obj-y := ap_rx64m_0a.o lowlevel_init.o
--- /dev/null
+++ b/board/alphaproject/ap_rx64m_0a/ap_rx64m_0a.c
@@ -0,0 +1,210 @@
1+/*
2+ * Copyright (C) 2015 Yoshinori Sato
3+ * (C) Copyright 2000-2003
4+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5+ *
6+ * board/hokuto/HSBRX63N/hsbrx63n.c
7+ *
8+ * This program is free software; you can redistribute it and/or
9+ * modify it under the terms of the GNU General Public License as
10+ * published by the Free Software Foundation; either version 2 of
11+ * the License, or (at your option) any later version.
12+ *
13+ * This program is distributed in the hope that it will be useful,
14+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16+ * GNU General Public License for more details.
17+ *
18+ * You should have received a copy of the GNU General Public License
19+ * along with this program; if not, write to the Free Software
20+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21+ * MA 02111-1307 USA
22+ */
23+
24+#include <common.h>
25+#include <mmc.h>
26+#include <spi.h>
27+#include <netdev.h>
28+#include <asm/io.h>
29+#include <asm/processor.h>
30+#include <asm/sections.h>
31+#include <linux/usb/r8a66597.h>
32+
33+int checkboard(void)
34+{
35+ puts("BOARD: AP-RX64M-0A\n");
36+ return 0;
37+}
38+
39+static void sdram_init(void)
40+{
41+ *(volatile unsigned short *)0x00080006 = 0x5a03;
42+ *(volatile unsigned long *)0x00080020 |= (1 << 22);
43+ *(volatile unsigned char *)0x0008c104 = 0xff;
44+ *(volatile unsigned char *)0x0008c106 = 0x51;
45+ *(volatile unsigned char *)0x0008c107 = 0xda;
46+ *(volatile unsigned long *)0x00080020 &= ~(1 << 22);
47+
48+ *(volatile unsigned char *)0x00083c00 = 0x00;
49+ *(volatile unsigned char *)0x00083c10 = 0x00;
50+ *(volatile unsigned char *)0x00083c16 = 0x00;
51+ *(volatile unsigned short *)0x00083c24 = 0x0588;
52+ *(volatile unsigned char *)0x00083c20 = 0x01;
53+ while(*(volatile unsigned char *)0x00083c50 & 0x08);
54+
55+ *(volatile unsigned char *)0x00083c00 = 0x00;
56+ *(volatile unsigned short *)0x00083c48 = 0x0040;
57+ while(*(volatile unsigned char *)0x00083c50);
58+
59+ *(volatile unsigned long *)0x00083c44 = 0x00021203;
60+ *(volatile unsigned char *)0x00083c40 = 0x01;
61+
62+ *(volatile unsigned short *)0x00083c14 = 0x53e7;
63+ *(volatile unsigned char *)0x00083c02 = 0x00;
64+ *(volatile unsigned char *)0x00083c16 = 0x01;
65+ *(volatile unsigned char *)0x00083c10 = 0x00;
66+
67+ *(volatile unsigned char *)0x00083c00 = 0x01;
68+ memset(__bss_start, 0, (void *)&__bss_end - (void *)__bss_start);
69+}
70+
71+int board_early_init_f(void)
72+{
73+ *(volatile unsigned long *)0x00080010 &= ~0x00008000;
74+ *(volatile unsigned long *)0x00080018 &= ~0x02000000;
75+ /* P87 - SCIF10:TxD / P86 - SCIF10:RxD */
76+ *(volatile unsigned char *)0x0008c11f &= ~0x80;
77+ *(volatile unsigned char *)0x0008c11f |= 0x40;
78+ *(volatile unsigned char *)0x0008c186 |= 0x0a;
79+ *(volatile unsigned char *)0x0008c187 |= 0x0a;
80+ *(volatile unsigned char *)0x0008c068 |= 0xc0;
81+#if defined(CONFIG_SH_ETHER)
82+ *(volatile unsigned long *)0x00080014 &= ~0x00008000;
83+#endif
84+#if defined(CONFIG_SPI_FLASH) || defined(CONFIG_MMC_SPI)
85+ *(volatile unsigned char *)0x0008c156 |= 0x0d;
86+ *(volatile unsigned char *)0x0008c157 |= 0x0d;
87+ *(volatile unsigned char *)0x0008c158 |= 0x0d;
88+ *(volatile unsigned char *)0x0008c062 |= 0xc0;
89+ *(volatile unsigned char *)0x0008c063 |= 0x01;
90+ *(volatile unsigned long *)0x00080014 &= ~0x00010000;
91+#endif
92+#if defined(CONFIG_SPI_FLASH)
93+ *(volatile unsigned char *)0x0008c028 |= 0x10;
94+ *(volatile unsigned char *)0x0008c008 |= 0x10;
95+#endif
96+#if defined(CONFIG_MMC_SPI)
97+ *(volatile unsigned char *)0x0008c028 |= 0x20;
98+ *(volatile unsigned char *)0x0008c008 |= 0x20;
99+#endif
100+#if defined(CONFIG_USB_R8A66597_HCD)
101+ *(volatile unsigned long *)0x00080014 &= ~0x00080000;
102+ *(volatile unsigned char *)0x0008c14c = 0x12;
103+ *(volatile unsigned char *)0x0008c14e = 0x12;
104+ *(volatile unsigned char *)0x0008c061 |= 0x50;
105+#endif
106+#if defined(CONFIG_USB_GADGET_R8A66597)
107+ *(volatile unsigned long *)0x00080014 &= ~0x00040000;
108+ *(volatile unsigned char *)0x0008c14d = 0x11;
109+ *(volatile unsigned char *)0x0008c14d = 0x11;
110+ *(volatile unsigned char *)0x0008c115 = 0x4;
111+ *(volatile unsigned char *)0x0008c061 |= 0xa0;
112+#endif
113+ *(volatile unsigned char *)0x0008c11f &= ~0x40;
114+ *(volatile unsigned char *)0x0008c11f |= 0x80;
115+ sdram_init();
116+ return 0;
117+}
118+
119+int board_late_init(void)
120+{
121+ DECLARE_GLOBAL_DATA_PTR;
122+#if defined(CONFIG_MMC_SPI)
123+ mmc_initialize(gd->bd);
124+#endif
125+#if defined(CONFIG_USB_GADGET_R8A66597)
126+ static struct r8a66597_platdata r8a66597pd = {
127+ .port_power = NULL,
128+ .buswait = 0,
129+ .on_chip = ON_CHIP_RX600,
130+ .xtal = 0,
131+ .vif = 1,
132+ .wr0_shorted_to_wr1 = 0,
133+ };
134+ r8a66597_probe(&r8a66597pd);
135+#endif
136+ /* RTC clock initialize */
137+ *(volatile unsigned char *)0x0008c428 &= ~0x01;
138+ *(volatile unsigned char *)0x00080033 |= 0x01;
139+ while ((*(volatile unsigned char *)0x00080033 & 0x01) == 0x00);
140+ *(volatile unsigned char *)0x0008c426 &= ~0x01;
141+ while ((*(volatile unsigned char *)0x0008c426 & 0x01) == 0x01);
142+ udelay(200);
143+ *(volatile unsigned char *)0x0008c426 =
144+ (*(volatile unsigned char *)0x0008c426 & 0xf1) | 0x0c;
145+ while ((*(volatile unsigned char *)0x0008c426 & 0x0e) != 0x0c);
146+ *(volatile unsigned char *)0x0008c426 |= 0x01;
147+ while ((*(volatile unsigned char *)0x0008c426 & 0x01) == 0x00);
148+ udelay(1000 * 1000);
149+
150+ return 0;
151+}
152+
153+#if defined(CONFIG_SH_ETHER)
154+int board_eth_init(bd_t *bis)
155+{
156+ *(volatile unsigned char *)0x0008c00c |= 0x10;
157+ *(volatile unsigned char *)0x0008c02c &= ~0x10;
158+ udelay(200);
159+ *(volatile unsigned char *)0x0008c02c |= 0x10;
160+
161+ *(volatile unsigned char *)0x0008c11f = 0x00;
162+ *(volatile unsigned char *)0x0008c11f = 0x40;
163+ *(volatile unsigned char *)0x0008c179 = 0x11;
164+ *(volatile unsigned char *)0x0008c17a = 0x11;
165+ *(volatile unsigned char *)0x0008c17c = 0x12;
166+ *(volatile unsigned char *)0x0008c17d = 0x12;
167+ *(volatile unsigned char *)0x0008c17e = 0x12;
168+ *(volatile unsigned char *)0x0008c17f = 0x12;
169+ *(volatile unsigned char *)0x0008c180 = 0x12;
170+ *(volatile unsigned char *)0x0008c181 = 0x12;
171+ *(volatile unsigned char *)0x0008c182 = 0x12;
172+ *(volatile unsigned char *)0x0008c183 = 0x12;
173+ *(volatile unsigned char *)0x0008c11f = 0x00;
174+ *(volatile unsigned char *)0x0008c11f = 0x80;
175+ *(volatile unsigned char *)0x0008c067 |= 0xf6;
176+ *(volatile unsigned char *)0x0008c068 |= 0x0f;
177+ return sh_eth_initialize(bis);
178+}
179+#endif
180+
181+#if defined(CONFIG_SPI_FLASH) || defined(CONFIG_MMC_SPI)
182+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
183+{
184+ return (bus == 1) && ((cs == 0) || (cs == 1));
185+}
186+
187+void spi_cs_activate(struct spi_slave *slave)
188+{
189+ switch(slave->cs) {
190+ case 0:
191+ *(volatile unsigned char *)0x0008c028 &= ~0x10;
192+ break;
193+ case 1:
194+ *(volatile unsigned char *)0x0008c028 &= ~0x20;
195+ break;
196+ }
197+}
198+
199+void spi_cs_deactivate(struct spi_slave *slave)
200+{
201+ switch(slave->cs) {
202+ case 0:
203+ *(volatile unsigned char *)0x0008c028 |= 0x10;
204+ break;
205+ case 1:
206+ *(volatile unsigned char *)0x0008c028 |= 0x20;
207+ break;
208+ }
209+}
210+#endif
--- /dev/null
+++ b/board/alphaproject/ap_rx64m_0a/lowlevel_init.S
@@ -0,0 +1,87 @@
1+/*
2+ * (C) Copyright 2011 Yoshinori Sato
3+ *
4+ * This program is free software; you can redistribute it and/or
5+ * modify it under the terms of the GNU General Public License as
6+ * published by the Free Software Foundation; either version 2 of
7+ * the License, or (at your option) any later version.
8+ *
9+ * This program is distributed in the hope that it will be useful,
10+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
11+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+ * GNU General Public License for more details.
13+ *
14+ * You should have received a copy of the GNU General Public License
15+ * along with this program; if not, write to the Free Software
16+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17+ * MA 02111-1307 USA
18+ */
19+
20+#include <config.h>
21+#include <version.h>
22+
23+#include <asm/processor.h>
24+
25+ .global lowlevel_init
26+
27+ .text
28+ .align 2
29+
30+lowlevel_init:
31+ mov.l #4f,r1
32+ mov.l #0x00080000,r2
33+1:
34+ mov.l [r1+],r3
35+ tst r3,r3
36+ bn 3f
37+ mov.l [r1+],r4
38+ shlr #16,r3,r5
39+ and #0xffff,r3
40+ bra r5
41+ mov.b r4,[r3,r2]
42+ bra 1b
43+ mov.w r4,[r3,r2]
44+ bra 1b
45+ mov.l r4,[r3,r2]
46+ bra 1b
47+2: sub #1,r4
48+ bne 2b
49+ nop
50+ bra 1b
51+
52+3:
53+ /* dataflash read enable */
54+ mov.l #0x7fc440,r1
55+ mov.w #0x2dff,[r1]
56+ mov.w #0xd2ff,2[r1]
57+ rts
58+
59+4:
60+#define BYTE 0
61+#define WORD 1
62+#define LONG 2
63+#define WAIT 3
64+#define REGINIT(offset, size, val) .long ((2 + size * 5) << 16)|(offset >> size),val
65+ /* Clock/PowerManagement write enable */
66+ REGINIT(0x03FE,WORD,0xa503)
67+ /* Main OSC enbale */
68+ REGINIT(0x0032,BYTE,0x00)
69+ /* Wait for OSC stable */
70+ REGINIT(0x0000,WAIT,1400)
71+ /* PLLIN:12MHz PLLOUT:240MHz */
72+ REGINIT(0x0028,WORD,0x2701)
73+ /* PLL enable */
74+ REGINIT(0x002A,BYTE,0x00)
75+ /* Wait for PLL stable */
76+ REGINIT(0x0000,WAIT,120)
77+ /* FCLK:/4, ICLK:/2, BCLK:/4, PCLKA:/2 PCLKB-D:/4 */
78+ /* SDCLK and BCLK enable */
79+ REGINIT(0x0020,LONG,0x21021222)
80+ /* UCLK:/5 */
81+ REGINIT(0x0024,WORD,0x0041)
82+ /* PLL select */
83+ REGINIT(0x0026,WORD,0x0400)
84+
85+ .long 0xffffffff
86+
87+ .align 2
--- /dev/null
+++ b/board/alphaproject/ap_rx64m_0a/u-boot.lds
@@ -0,0 +1,94 @@
1+/*
2+ * Copyright (C) 2011 Yoshinori Sato
3+ *
4+ * See file CREDITS for list of people who contributed to this
5+ * project.
6+ *
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License as
9+ * published by the Free Software Foundation; either version 2 of
10+ * the License, or (at your option) any later version.
11+ *
12+ * This program is distributed in the hope that it will be useful,
13+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
14+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+ * GNU General Public License for more details.
16+ *
17+ * You should have received a copy of the GNU General Public License
18+ * along with this program; if not, write to the Free Software
19+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20+ * MA 02111-1307 USA
21+ */
22+
23+#include <config.h>
24+OUTPUT_FORMAT("elf32-rx-le")
25+OUTPUT_ARCH(rx)
26+ENTRY(_start)
27+
28+MEMORY {
29+ iram : ORIGIN = 0x0000100, LENGTH = 512K - 256
30+ sdram : ORIGIN = 0x08000000, LENGTH = 32M
31+ irom : ORIGIN = 0xfffc0000, LENGTH = 256K - 128
32+ vector : ORIGIN = 0xffffff80, LENGTH = 128
33+}
34+
35+SECTIONS
36+{
37+ .text :
38+ {
39+ PROVIDE (_ftext = .);
40+ PROVIDE (_fcode = .);
41+ PROVIDE (_start = .);
42+
43+ KEEP(arch/rx/cpu/rxv2/start.o (.text))
44+ *(.text)
45+ . = ALIGN(4);
46+ PROVIDE (_ecode = .);
47+ } > iram
48+ .rodata :
49+ {
50+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
51+ . = ALIGN(4);
52+ } > iram
53+ .u_boot_list : {
54+ KEEP(*(SORT(.u_boot_list*)));
55+ } > iram
56+ PROVIDE (_etext = .);
57+
58+ . = 0xffffff80;
59+ .vector :
60+ {
61+ *(.vector);
62+ } > vector
63+
64+ PROVIDE (__ram_vec = 0x00000000);
65+
66+ .data :
67+ {
68+ PROVIDE (_fdata = .);
69+ *(.data)
70+ *(.stack)
71+ . = ALIGN(4);
72+ PROVIDE (_edata = .);
73+ } > iram
74+ _iram_start = _etext + SIZEOF(.data);
75+ .iram.text :
76+ {
77+ _iram_text = .;
78+ *(.iram.text)
79+ _iram_text_end = .;
80+ } > iram
81+
82+ .bss :
83+ {
84+ PROVIDE (__bss_start = .);
85+ *(.bss*)
86+ . = ALIGN(4);
87+ } > iram
88+ PROVIDE (__bss_end = .);
89+ PROVIDE (__init_end = .);
90+
91+ PROVIDE (__stack = 0x00040000);
92+
93+ PROVIDE (_end = .);
94+}
--- a/boards.cfg
+++ b/boards.cfg
@@ -1183,6 +1183,7 @@ Active rx rx600 - - rxsim
11831183 Active rx rx600 - tokuden rx-mega rx-mega - Yoshinori Sato <ysato@users.sourceforge.jp>
11841184 Active rx rx600 - tokuden ult62n ult62n - Yoshinori Sato <ysato@users.sourceforge.jp>
11851185 Active rx rx600 - hokuto HSBRX63NC HSBRX63NC - Yoshinori Sato <ysato@users.sourceforge.jp>
1186+Active rx rxv2 - alphaproject ap_rx64m_0a ap_rx64m_0a - Yoshinori Sato <ysato@users.sourceforge.jp>
11861187 Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass <sjg@chromium.org>
11871188 Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>:Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
11881189 Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy <phil.edworthy@renesas.com>
--- /dev/null
+++ b/include/configs/ap_rx64m_0a.h
@@ -0,0 +1,139 @@
1+/*
2+ * Configuation settings for AP-RX64M-0A
3+ *
4+ * Copyright (C) 2011 Yoshinori Sato
5+ *
6+ * See file CREDITS for list of people who contributed to this
7+ * project.
8+ *
9+ * This program is free software; you can redistribute it and/or
10+ * modify it under the terms of the GNU General Public License as
11+ * published by the Free Software Foundation; either version 2 of
12+ * the License, or (at your option) any later version.
13+ *
14+ * This program is distributed in the hope that it will be useful,
15+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
16+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17+ * GNU General Public License for more details.
18+ *
19+ * You should have received a copy of the GNU General Public License
20+ * along with this program; if not, write to the Free Software
21+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22+ * MA 02111-1307 USA
23+ */
24+
25+#ifndef __AP_RX64M_0A_H
26+#define __AP_RX64M_0A_H
27+
28+#define CONFIG_RX 1
29+#define CONFIG_RXV2 1
30+#define CONFIG_CPU_RX64M 1
31+
32+#include <config_cmd_default.h>
33+#undef CONFIG_CMD_BDI
34+#undef CONFIG_CMD_FPGA
35+#undef CONFIG_CMD_IMI
36+#undef CONFIG_CMD_IMLS
37+#undef CONFIG_CMD_SETGETDCR
38+#undef CONFIG_CMD_FLASH
39+
40+#define CONFIG_SYS_NO_FLASH
41+
42+#define CONFIG_BAUDRATE 115200
43+#define CONFIG_BOOTARGS "console=ttySC0,115200"
44+#define CONFIG_BOARD_LATE_INIT
45+#define CONFIG_SYS_GENERIC_BOARD
46+#define CONFIG_BOARD_EARLY_INIT_F
47+#define CONFIG_DISPLAY_CPUINFO
48+#define CONFIG_DISPLAY_BOARDINFO
49+
50+#define CONFIG_VERSION_VARIABLE
51+#undef CONFIG_SHOW_BOOT_PROGRESS
52+
53+/* system */
54+#define CONFIG_SYS_TEXT_BASE 0x00008000
55+#define CONFIG_SYS_LONGHELP /* undef to save memory */
56+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
57+#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
58+#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
59+#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
60+/* List of legal baudrate settings for this board */
61+#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 }
62+
63+#define CONFIG_ENV_IS_NOWHERE
64+#define CONFIG_ENV_SIZE 2048
65+#define CONFIG_ENV_ADDR 0x100000
66+
67+/* SCI */
68+#define CONFIG_SCIF_A 1
69+#define CONFIG_SCIF_CONSOLE 1
70+#define CONFIG_CONS_SCIF2 1
71+
72+/* memory */
73+#define CONFIG_SYS_SRAM_BASE 0x00000000
74+#define CONFIG_SYS_SRAM_SIZE 0x00080000
75+#if 0
76+#define CONFIG_SYS_SDRAM_BASE 0x08000000
77+#define CONFIG_SYS_SDRAM_SIZE (16 * 1024 * 1024)
78+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
79+#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE
80+#endif
81+#define CONFIG_SYS_MEMTEST_START 0
82+#define CONFIG_SYS_MEMTEST_END 0
83+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START)
84+#define CONFIG_SYS_MONITOR_BASE 0x8000 /*(CONFIG_SYS_SDRAM_BASE)*/
85+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
86+#define CONFIG_SYS_MALLOC_LEN (64 * 1024)
87+#define CONFIG_SYS_GBL_DATA_SIZE 256
88+#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
89+#define CONFIG_SYS_MAX_FLASH_SECT 16
90+#define CONFIG_SYS_MAX_FLASH_BANKS 1
91+#define CONFIG_SYS_FLASH_PROTECTION
92+
93+#define CONFIG_SYS_CLK_FREQ 120000000
94+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
95+#define CONFIG_SYS_HZ 1000
96+
97+#if defined(CONFIG_CMD_NET)
98+#define CONFIG_SH_ETHER 1
99+#define CONFIG_SH_ETHER_USE_PORT (0)
100+#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
101+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
102+#define CONFIG_MII 1
103+#define CONFIG_BITBANGMII 1
104+#define CONFIG_BITBANGMII_MULTI 1
105+#define CONFIG_PHYLIB 1
106+#define CONFIG_PHY_SMSC 1
107+#endif
108+
109+#if defined(CONFIG_CMD_USB)
110+#define CONFIG_USB_R8A66597_HCD
111+#define CONFIG_R8A66597_BASE_ADDR 0x000a0200
112+#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
113+#define CONFIG_SUPERH_ON_CHIP_R8A66597
114+#define CONFIG_R8A66597_VBUS_NEG
115+#define CONFIG_USB_STORAGE
116+#endif
117+
118+#if 0
119+#define CONFIG_USB_GADGET
120+#define CONFIG_USB_GADGET_R8A66597
121+#define CONFIG_R8A66597_UDC_BASE 0x000a0000
122+#define CONFIG_USB_GADGET_SERIAL
123+#define CONFIG_USB_TTY_CDC
124+#endif
125+
126+#if defined(CONFIG_CMD_MMC_SPI) || defined(CONFIG_CMD_SPI)
127+#define CONFIG_RX_RSPI
128+#define CONFIG_RSPI_BASE 0x000883a0
129+#define CONFIG_RSPI_CLK CONFIG_SYS_CLK_FREQ
130+#endif
131+#if defined(CONFIG_CMD_MMC_SPI)
132+#define CONFIG_MMC
133+#define CONFIG_MMC_SPI
134+#define CONFIG_GENERIC_MMC
135+#endif
136+
137+/*#define CONFIG_RXRTC*/
138+
139+#endif