| Revision | c2dbc56c789de207d2acf7ac4bfe51bc918ef8fa (tree) |
|---|---|
| Time | 2015-06-07 15:22:05 |
| Author | Yoshinori Sato <ysato@user...> |
| Commiter | Yoshinori Sato |
h8300: update AE3096 support
board/ae3069/Makefile (diff)
board/ae3069/ae3069.c (diff) board/ae3069/lowlevel_init.S (diff) board/ae3069/u-boot.lds (diff)
include/configs/ae3069.h (diff)| @@ -18,31 +18,4 @@ | ||
| 18 | 18 | # Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | 19 | # MA 02111-1307 USA |
| 20 | 20 | |
| 21 | -#include $(TOPDIR)/config.mk | |
| 22 | - | |
| 23 | -LIB = lib$(BOARD).a | |
| 24 | - | |
| 25 | -OBJS := ae3069.o | |
| 26 | -SOBJS := lowlevel_init.o | |
| 27 | - | |
| 28 | -LIB := $(addprefix $(obj),$(LIB)) | |
| 29 | -OBJS := $(addprefix $(obj),$(OBJS)) | |
| 30 | -SOBJS := $(addprefix $(obj),$(SOBJS)) | |
| 31 | - | |
| 32 | -$(LIB): $(obj).depend $(OBJS) $(SOBJS) | |
| 33 | - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) | |
| 34 | - | |
| 35 | -clean: | |
| 36 | - rm -f $(SOBJS) $(OBJS) | |
| 37 | - | |
| 38 | -distclean: clean | |
| 39 | - rm -f $(LIB) core *.bak .depend | |
| 40 | - | |
| 41 | -######################################################################### | |
| 42 | - | |
| 43 | -# defines $(obj).depend target | |
| 44 | -include $(SRCTREE)/rules.mk | |
| 45 | - | |
| 46 | -sinclude $(obj).depend | |
| 47 | - | |
| 48 | -######################################################################### | |
| 21 | +obj-y := ae3069.o lowlevel_init.o |
| @@ -19,10 +19,11 @@ | ||
| 19 | 19 | |
| 20 | 20 | #include <common.h> |
| 21 | 21 | #include <net.h> |
| 22 | -#include <netdev.h> | |
| 23 | 22 | #include <asm/io.h> |
| 24 | 23 | #include <asm/processor.h> |
| 25 | 24 | |
| 25 | +void h8300_gpio_init(void); | |
| 26 | + | |
| 26 | 27 | int checkboard(void) |
| 27 | 28 | { |
| 28 | 29 | puts("BOARD: Akizukidenshi AE-3069\n"); |
| @@ -34,13 +35,19 @@ int board_init(void) | ||
| 34 | 35 | return 0; |
| 35 | 36 | } |
| 36 | 37 | |
| 38 | +int board_early_init_f(void) | |
| 39 | +{ | |
| 40 | + h8300_gpio_init(); | |
| 41 | + return 0; | |
| 42 | +} | |
| 43 | + | |
| 37 | 44 | int dram_init(void) |
| 38 | 45 | { |
| 39 | 46 | DECLARE_GLOBAL_DATA_PTR; |
| 40 | 47 | |
| 41 | 48 | gd->bd->bi_memstart = CONFIG_SYS_DRAM_BASE; |
| 42 | 49 | gd->bd->bi_memsize = CONFIG_SYS_DRAM_SIZE; |
| 43 | - printf("DRAM: %dMB\n", CONFIG_SYS_DRAM_SIZE / (1024 * 1024)); | |
| 50 | + gd->ram_size = CONFIG_SYS_DRAM_SIZE; | |
| 44 | 51 | return 0; |
| 45 | 52 | } |
| 46 | 53 |
| @@ -26,10 +26,10 @@ | ||
| 26 | 26 | |
| 27 | 27 | _lowlevel_init: |
| 28 | 28 | mov.l #init_table,er4 |
| 29 | + mov.w #0x00fe,e5 /* 0xfexxxx */ | |
| 29 | 30 | 1: |
| 30 | - mov.w @er4,r5 | |
| 31 | + mov.w @er4+,r5 | |
| 31 | 32 | beq 3f |
| 32 | - mov.w #0x00fe,e5 /* 0xfexxxx */ | |
| 33 | 33 | mov.w @er4+,r0 |
| 34 | 34 | mov.b r0l,@er5 |
| 35 | 35 | bra 1b |
| @@ -37,17 +37,25 @@ _lowlevel_init: | ||
| 37 | 37 | mov.l #420000,er0 /* wait 50ms */ |
| 38 | 38 | 4: dec.l #1,er0 |
| 39 | 39 | bpl 4b |
| 40 | + | |
| 41 | + mov.l #_fdata,er5 | |
| 42 | + mov.l #_ram_data,er6 | |
| 43 | + mov.l #_sizeof_data,er4 | |
| 44 | + eepmov.w | |
| 40 | 45 | rts |
| 41 | 46 | |
| 47 | + /* | |
| 48 | + 00FEE020: FF FB FF C8 C6 FF 38 98 B7 05 09 98 7F 00 00 00 | |
| 49 | + */ | |
| 42 | 50 | .align 2 |
| 43 | 51 | init_table: |
| 44 | 52 | .word 0xe02a,9 /* RTCOR */ |
| 45 | 53 | .word 0xe028,0x30 /* RTMCSR */ |
| 46 | 54 | .word 0xe027,0x98 /* DRCRB */ |
| 47 | - .word 0xe026,0x38 /* DRCRA */ | |
| 48 | - .word 0xe021,0xfb /* ASTCR */ | |
| 55 | + .word 0xe026,0x50 /* DRCRA */ | |
| 56 | + .word 0xe021,0xf3 /* ASTCR */ | |
| 49 | 57 | .word 0xe022,0xff /* WCRH */ |
| 50 | - .word 0xe023,0xc8 /* WCRL */ | |
| 58 | + .word 0xe023,0x08 /* WCRL */ | |
| 51 | 59 | .word 0xe000,0xff /* P1DDR */ |
| 52 | 60 | .word 0xe001,0xff /* P2DDR */ |
| 53 | 61 | .word 0xe004,0xf1 /* P5DDR */ |
| @@ -26,19 +26,30 @@ ENTRY(_start) | ||
| 26 | 26 | |
| 27 | 27 | MEMORY |
| 28 | 28 | { |
| 29 | - irom : ORIGIN = 0x000000, LENGTH = 512K | |
| 30 | - dram : ORIGIN = 0x400000, LENGTH = 2M | |
| 31 | - iram : ORIGIN = 0xffbf20, LENGTH = 16K | |
| 29 | + vector : ORIGIN = 0x000000, LENGTH = 4K | |
| 30 | + config : ORIGIN = 0x001000, LENGTH = 28K | |
| 31 | + irom : ORIGIN = 0x008000, LENGTH = 480K | |
| 32 | + dram : ORIGIN = 0x7b0000, LENGTH = 320K | |
| 33 | + /* 0xffbf20 - 0xffc720 using flash writer */ | |
| 34 | + iram : ORIGIN = 0xffcf20, LENGTH = 12K | |
| 32 | 35 | } |
| 33 | 36 | |
| 34 | 37 | SECTIONS |
| 35 | 38 | { |
| 39 | + | |
| 40 | + .vector : | |
| 41 | + { | |
| 42 | + *(.vector) | |
| 43 | + } > vector | |
| 44 | + .config : | |
| 45 | + { | |
| 46 | + *(.config) | |
| 47 | + } > config | |
| 36 | 48 | PROVIDE (__start = .); |
| 37 | 49 | PROVIDE (__ftext = .); |
| 38 | - | |
| 39 | 50 | .text : |
| 40 | 51 | { |
| 41 | - cpu/h8300h/start.o (.text) | |
| 52 | + KEEP(arch/h8300/cpu/h8300h/start.o (.text)) | |
| 42 | 53 | . = ALIGN(4); |
| 43 | 54 | *(.text) |
| 44 | 55 | . = ALIGN(4); |
| @@ -49,40 +60,46 @@ SECTIONS | ||
| 49 | 60 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| 50 | 61 | . = ALIGN(4); |
| 51 | 62 | } > irom |
| 52 | - PROVIDE (__etext = .); | |
| 53 | - | |
| 54 | - PROVIDE (___u_boot_cmd_start = .); | |
| 55 | - .u_boot_cmd : | |
| 56 | - { | |
| 57 | - *(.u_boot_cmd) | |
| 58 | - . = ALIGN(4); | |
| 63 | + .u_boot_list : { | |
| 64 | + KEEP(*(SORT(.u_boot_list*))); | |
| 59 | 65 | } > irom |
| 60 | - PROVIDE (___u_boot_cmd_end = .); | |
| 66 | + PROVIDE (__etext = .); | |
| 67 | + PROVIDE (_etext = .); | |
| 61 | 68 | |
| 62 | 69 | PROVIDE (__fdata = .); |
| 70 | + PROVIDE (_fdata = .); | |
| 63 | 71 | .data : |
| 64 | 72 | { |
| 65 | - PROVIDE (__ram_data = .); | |
| 66 | - | |
| 73 | + PROVIDE (_ram_data = .); | |
| 67 | 74 | *(.data) |
| 68 | 75 | . = ALIGN(4); |
| 76 | + __init_end = .; | |
| 69 | 77 | } >dram AT>irom |
| 70 | - PROVIDE (__sizeof_data = SIZEOF(.data)); | |
| 71 | - PROVIDE (__edata = .); | |
| 78 | + PROVIDE (_sizeof_data = SIZEOF(.data)); | |
| 79 | + PROVIDE (_edata = .); | |
| 80 | + PROVIDE (_iram_text = _fdata + SIZEOF(.data)); | |
| 72 | 81 | |
| 73 | - PROVIDE (_bss_start = .); | |
| 74 | - PROVIDE (___bss_start = .); | |
| 82 | + PROVIDE (bss_start = .); | |
| 83 | + PROVIDE (__bss_start = .); | |
| 75 | 84 | .bss : |
| 76 | 85 | { |
| 77 | 86 | *(.bss) |
| 78 | 87 | . = ALIGN(4); |
| 79 | 88 | } > dram |
| 80 | - PROVIDE (_bss_end = .); | |
| 89 | + PROVIDE (__bss_end = .); | |
| 81 | 90 | |
| 82 | - PROVIDE (__end = .); | |
| 83 | - .iram : | |
| 91 | + PROVIDE (_end = .); | |
| 92 | + .iram_text : | |
| 84 | 93 | { |
| 85 | - } | |
| 86 | - PROVIDE (__ram_vec = 0xfffe20); | |
| 87 | - PROVIDE (__init_stack = 0xffff20); | |
| 94 | + PROVIDE (_iram_top = .); | |
| 95 | + *(.text2) | |
| 96 | + } >iram AT>irom | |
| 97 | + .iram_bss : | |
| 98 | + { | |
| 99 | + *(.bss2) | |
| 100 | + } >iram AT>irom | |
| 101 | + | |
| 102 | + PROVIDE (_init_stack = 0xfffe20); | |
| 103 | + PROVIDE (_ram_vec = 0xfffe20); | |
| 104 | + PROVIDE (_run_stack = _ram_data); | |
| 88 | 105 | } |
| @@ -26,26 +26,19 @@ | ||
| 26 | 26 | #define __AE3069_H |
| 27 | 27 | |
| 28 | 28 | #undef DEBUG |
| 29 | -#define CONFIG_H8300 1 | |
| 30 | -#define CONFIG_H8300H 1 | |
| 31 | 29 | #define CONFIG_CPU_H83069 1 |
| 32 | -#define CONFIG_AE3069 1 | |
| 33 | -#define CONFIG_H8300_SIM 1 | |
| 34 | - | |
| 35 | -#undef CONFIG_CMD_FLASH | |
| 36 | -#undef CONFIG_CMD_NET | |
| 37 | -#undef CONFIG_CMD_NFS | |
| 38 | -#undef CONFIG_CMD_PING | |
| 39 | -#undef CONFIG_CMD_SAVEENV | |
| 40 | -#undef CONFIG_CMD_SDRAM | |
| 41 | -#define CONFIG_CMD_MEMORY | |
| 42 | -#undef CONFIG_CMD_CACHE | |
| 30 | +#define CONFIG_H8300_RELOCATE 0 | |
| 43 | 31 | |
| 44 | 32 | #define CONFIG_BAUDRATE 38400 |
| 45 | -#define CONFIG_BOOTARGS "console=ttySC0,115200" | |
| 33 | +#define CONFIG_BOOTARGS "console=ttySC0,38400" | |
| 46 | 34 | |
| 47 | -#define CONFIG_VERSION_VARIABLE | |
| 35 | +#define CONFIG_SYS_TEXT_BASE 0x008000 | |
| 36 | +#define CONFIG_SYS_MONITOR_BASE 0x7b0000 | |
| 37 | +#define CONFIG_BOARD_EARLY_INIT_F | |
| 38 | +#undef CONFIG_VERSION_VARIABLE | |
| 48 | 39 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 40 | +#define CONFIG_OF_LIBFDT | |
| 41 | +#define CONFIG_LMB | |
| 49 | 42 | |
| 50 | 43 | /* MEMORY */ |
| 51 | 44 | #define AE3069_DRAM_BASE 0x400000 |
| @@ -60,9 +53,13 @@ | ||
| 60 | 53 | /* List of legal baudrate settings for this board */ |
| 61 | 54 | #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } |
| 62 | 55 | |
| 56 | +#define CONFIG_SYS_CLK_FREQ 20000000 | |
| 57 | +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ | |
| 58 | + | |
| 63 | 59 | /* SCI */ |
| 64 | -#define CONFIG_SCI_SERIAL 1 | |
| 65 | -#define CONFIG_SCI_BASE 0xffffb8 /* SCI1 */ | |
| 60 | +#define CONFIG_SCI 1 | |
| 61 | +#define CONFIG_SCIF_CONSOLE 1 | |
| 62 | +#define CONFIG_CONS_SCIF1 1 | |
| 66 | 63 | |
| 67 | 64 | /* TIMER */ |
| 68 | 65 | #define CONFIG_TIMER_BASE 0xffff80 /* CH0-1 */ |
| @@ -71,9 +68,10 @@ | ||
| 71 | 68 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (2 * 1024 * 1024)) |
| 72 | 69 | |
| 73 | 70 | #define CONFIG_SYS_DRAM_BASE AE3069_DRAM_BASE |
| 74 | -#define CONFIG_SYS_DRAM_SIZE (2 * 1024 * 1024) | |
| 71 | +#define CONFIG_SYS_DRAM_SIZE (4 * 1024 * 1024) | |
| 75 | 72 | |
| 76 | -#define CONFIG_SYS_LOAD_ADDR 0x500000 | |
| 73 | +#define CONFIG_SYS_LOAD_ADDR 0x400000 | |
| 74 | +#define CONFIG_STANDALONE_LOAD_ADDR 0x400000 | |
| 77 | 75 | |
| 78 | 76 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
| 79 | 77 | #define CONFIG_SYS_GBL_DATA_SIZE 256 |
| @@ -83,7 +81,10 @@ | ||
| 83 | 81 | #define CONFIG_ENV_SIZE 1024 |
| 84 | 82 | #define CONFIG_ENV_IS_NOWHERE |
| 85 | 83 | |
| 86 | -/* Board Clock */ | |
| 87 | -#define CONFIG_SYS_HZ 20000000 | |
| 84 | +/* GPIO */ | |
| 85 | +#define CONFIG_H8300_GPIO \ | |
| 86 | + {0x00,0x00,0x00,0x00,0xff,0x0f,0x87,0xff,0x00,0xff,0xef} | |
| 87 | +#define CONFIG_H8300_INIT_DDR \ | |
| 88 | + {0xff,0xff,0x00,0x00,0x01,0x00,0x00,0x0e,0x00,0xff,0x00} | |
| 88 | 89 | |
| 89 | 90 | #endif /* __AE3069_H */ |
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