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Revision08048cbd5e7dc0a0359ccb8c7968e4d011174801 (tree)
Time2022-01-28 23:29:47
AuthorCédric Le Goater <clg@kaod...>
CommiterPeter Maydell

Log Message

hw/arm: ast2600: Fix address mapping of second SPI controller

Address should be 0x1E631000 and not 0x1E641000 as initially introduced.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/838
Fixes: f25c0ae1079d ("aspeed/soc: Add AST2600 support")
Suggested-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20220126083520.4135713-1-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Change Summary

Incremental Difference

--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -29,7 +29,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
2929 [ASPEED_DEV_PWM] = 0x1E610000,
3030 [ASPEED_DEV_FMC] = 0x1E620000,
3131 [ASPEED_DEV_SPI1] = 0x1E630000,
32- [ASPEED_DEV_SPI2] = 0x1E641000,
32+ [ASPEED_DEV_SPI2] = 0x1E631000,
3333 [ASPEED_DEV_EHCI1] = 0x1E6A1000,
3434 [ASPEED_DEV_EHCI2] = 0x1E6A3000,
3535 [ASPEED_DEV_MII1] = 0x1E650000,