簡易NC通信端末の製作
| Revision | 8ffac7cf58b6d449b4b1158bc9a79d8a6716ed08 (tree) |
|---|---|
| Time | 2012-06-07 11:05:41 |
| Author | KAZ.Imamura(Office) <kaz@tekk...> |
| Commiter | KAZ.Imamura(Office) |
000.000.016: 2012/06/07 11:02 : Memory map update due to Hterm.
[Modification]
[Confirmation]
Signed-off-by: KAZ.Imamura(Office) <kaz@tekken.cx>
H8_3069_h8mon.x (diff)
srcver.h (diff)
tool/monitor.c (diff) tool/monitor.sub (diff)| @@ -11,8 +11,8 @@ ENTRY("_start") | ||
| 11 | 11 | MEMORY |
| 12 | 12 | { |
| 13 | 13 | vectors(rw) : o = 0x000000, l = 0x100 |
| 14 | - ram(rwx) : o = 0x400000, l = 0x4000 | |
| 15 | - vrom(rwx) : o = 0x404000, l = 0x1C000 | |
| 14 | + vrom(rwx) : o = 0x400000, l = 0x1C000 | |
| 15 | + ram(rwx) : o = 0x41C000, l = 0x4000 | |
| 16 | 16 | eram(rwx) : o = 0x420000, l = 0x1E0000 |
| 17 | 17 | temp(rwx) : o = 0x600000, l = 0 |
| 18 | 18 | vvect(rw) : o = 0xffbf20, l = 0x100 |
| @@ -21,7 +21,8 @@ MEMORY | ||
| 21 | 21 | |
| 22 | 22 | SECTIONS |
| 23 | 23 | { |
| 24 | -.vectors : { | |
| 24 | +.vvect : { | |
| 25 | +/* .vectors : { */ | |
| 25 | 26 | LONG (ABSOLUTE(_start)) /* #00 Reserverd */ |
| 26 | 27 | LONG (ABSOLUTE(_start)) /* #01 Reserverd */ |
| 27 | 28 | LONG (ABSOLUTE(_start)) /* #02 Reserverd */ |
| @@ -75,17 +76,19 @@ SECTIONS | ||
| 75 | 76 | LONG (ABSOLUTE(_start)) /* #46 Reserverd */ |
| 76 | 77 | LONG (ABSOLUTE(_start)) /* #47 Reserverd */ |
| 77 | 78 | |
| 78 | - } > vectors | |
| 79 | +/* } > vectors */ | |
| 80 | + } > vvect | |
| 79 | 81 | |
| 80 | 82 | .text : { |
| 81 | 83 | *(.text) |
| 82 | 84 | *(.strings) |
| 83 | 85 | *(.rodata) |
| 84 | 86 | } > vrom |
| 85 | - | |
| 87 | +/* | |
| 86 | 88 | .vvect : { |
| 87 | 89 | *(.vvect) |
| 88 | 90 | } > vvect |
| 91 | +*/ | |
| 89 | 92 | |
| 90 | 93 | .bss : { |
| 91 | 94 | *(.bss) |
| @@ -12,9 +12,10 @@ | ||
| 12 | 12 | |
| 13 | 13 | #define SRCVER_MAJOR 0 |
| 14 | 14 | #define SRCVER_MINOR 0 |
| 15 | -#define SRCVER_BUILD 15 | |
| 15 | +#define SRCVER_BUILD 16 | |
| 16 | 16 | |
| 17 | 17 | /* -------------------------------------------------------------------- |
| 18 | +000.000.016: 2012/06/07 11:02 : Memory map update due to Hterm. | |
| 18 | 19 | 000.000.015: 2012/06/05 18:24 : File view, Dir view is updated. |
| 19 | 20 | 000.000.014: 2012/06/05 18:24 : FAT access is updated. DIR info can be read!! |
| 20 | 21 | 000.000.013: 2012/05/31 17:32 : Update FAT BPB information analysis. |
| @@ -0,0 +1,29 @@ | ||
| 1 | +/************************************************************************/ | |
| 2 | +/* H8/300H Monitor Program (Advanced Mode) Ver. 3.0A */ | |
| 3 | +/* Copyright (C) 2003 Renesas Technology Corp. */ | |
| 4 | +/************************************************************************/ | |
| 5 | +#include "3069s.h" /* */ | |
| 6 | +#pragma global_register(monitor=ER5) /* Return Address */ | |
| 7 | +void (*monitor)(void); /* */ | |
| 8 | +/************************************************************************/ | |
| 9 | +/* User Initialize Module */ | |
| 10 | +/* Input ER5 <-- Return Address */ | |
| 11 | +/* Output Nothing */ | |
| 12 | +/* Used Stack Area --> 0(0) Byte */ | |
| 13 | +/************************************************************************/ | |
| 14 | +#pragma noregsave(INITIALIZE) /* Non Register Save */ | |
| 15 | +void INITIALIZE(void) /* */ | |
| 16 | +{ /* */ | |
| 17 | + BSC.ABWCR.BYTE = 0xff; // CS0-CS7:8bitバス | |
| 18 | + BSC.ASTCR.BYTE = 0xff; // CS0-CS7:3ステートアクセス | |
| 19 | + BSC.BCR.BYTE = 0xc6; // | |
| 20 | + | |
| 21 | + P1DDR=0xFF; // Port1 use for BUS | |
| 22 | + P2DDR=0x07; // Port2 use for BUS | |
| 23 | + P8DDR=0xEC; // Port8(4-2) use for CS | |
| 24 | + RTCOR=0x03; | |
| 25 | + RTMCSR=0x27; | |
| 26 | + DRCRB=0x98; | |
| 27 | + DRCRA=0x78; | |
| 28 | + monitor(); /* Goto Monitor Program */ | |
| 29 | +} /* */ |
| @@ -0,0 +1,12 @@ | ||
| 1 | +INPUT ADVANCED,MONITOR | |
| 2 | +LIST MONITOR.MAP | |
| 3 | +SHOW SYMBOL | |
| 4 | +OUTPUT MONITOR.MOT | |
| 5 | +FORM STYPE | |
| 6 | +NOOPTIMIZE | |
| 7 | +LIBRARY ADVANCED,3069 | |
| 8 | +LIBRARY MONITOR | |
| 9 | +DEFINE $BRR=13 | |
| 10 | +DEFINE $STACK=FFFF20 | |
| 11 | +START VECTOR/0,ROM/100,RAM/FFC020,USER/FFBF20,SCI/FFFFB8 | |
| 12 | + |
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