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hardware/intel/intel-driver


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Revision44ed84c6fda3bb9f958a4de9304c3f4d86516b93 (tree)
Time2015-02-03 15:15:57
AuthorXiang, Haihao <haihao.xiang@inte...>
CommiterXiang, Haihao

Log Message

Disable upper bound check for decoding on BDW+

We saw pixel corruption in stress test with the wrong up-bound address.
For simplicity, disable upper bound check in the driver.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Change Summary

Incremental Difference

--- a/src/gen8_mfd.c
+++ b/src/gen8_mfd.c
@@ -282,7 +282,7 @@ gen8_mfd_ind_obj_base_addr_state(VADriverContextP ctx,
282282 OUT_BCS_BATCH(batch, 0);
283283 OUT_BCS_BATCH(batch, 0);
284284 /* Upper bound 4-5 */
285- OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */
285+ OUT_BCS_BATCH(batch, 0);
286286 OUT_BCS_BATCH(batch, 0);
287287
288288 /* MFX indirect MV 6-10 */
@@ -2493,7 +2493,7 @@ gen8_jpeg_wa_ind_obj_base_addr_state(VADriverContextP ctx,
24932493 gen7_mfd_context->jpeg_wa_slice_data_bo,
24942494 I915_GEM_DOMAIN_INSTRUCTION, 0,
24952495 0);
2496- OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */
2496+ OUT_BCS_BATCH(batch, 0);
24972497 OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */
24982498 OUT_BCS_BATCH(batch, 0);
24992499 OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */