Commit: 9eb885455fcbd74b700adf2889025ace6b508fd2 - motonesfpga (git)

Moto NES FPGA main repository

Commit MetaInfo

• Revision: 9eb885455fcbd74b700adf2889025ace6b508fd2 (tree)
• Time: 2013-07-19 13:15:32
• Author: astoria-d <astoria-d@mail...>
• Commiter: astoria-d

Log Message

sprite x-axis adjustment.

Change Summary

• modified: simulation/ppu/render.vhd
• modified: simulation/ppu/testbench_ppu.vhd

Incremental Difference

--- a/simulation/ppu/render.vhd
+++ b/simulation/ppu/render.vhd
@@ -523,7 +523,7 @@ begin
     ---primary oam
     oam_ram_ce_n <= clk when oam_bus_ce_n = '0' and r_nw = '0' else
                     '0' when oam_bus_ce_n = '0' and r_nw = '1' else
-                    not io_cnt(0) when ppu_mask(PPUSSP) = '1' and
+                    '0' when ppu_mask(PPUSSP) = '1' and
                              cur_x > conv_std_logic_vector(64, X_SIZE) and
                              cur_x <= conv_std_logic_vector(256, X_SIZE) and
                              p_oam_cnt_wrap_n = '1' else
@@ -838,6 +838,7 @@ end;
                             s_oam_data <= oam_data;
 
                             if (oam_ev_status = EV_STAT_COMP) then
+                                --check y range.
                                 if (cur_y < "000000110" and oam_data <= cur_y + "000000001") or 
                                     (cur_y >= "000000110" and oam_data <= cur_y + "000000001" and 
                                              oam_data >= cur_y - "000000110") then
@@ -919,7 +920,7 @@ end;
                             if (spr_attr(conv_integer(s_oam_addr_cpy(4 downto 2)))(SPRVFL) = '0') then
                                 vram_addr <= "0" & ppu_ctrl(PPUSPA) & 
                                             spr_tile_tmp(dsize - 1 downto 0) & "0" & 
-                                            (next_y(2 downto 0) - spr_y_tmp(2 downto 0) - "001");
+                                            (next_y(2 downto 0) - spr_y_tmp(2 downto 0));
                             else
                                 --flip sprite vertically.
                                 vram_addr <= "0" & ppu_ctrl(PPUSPA) & 
@@ -940,7 +941,7 @@ end;
                                 vram_addr <= "0" & ppu_ctrl(PPUSPA) & 
                                             spr_tile_tmp(dsize - 1 downto 0) & "0" & 
                                             (next_y(2 downto 0) - spr_y_tmp(2 downto 0))
-                                                + "00000000000111";
+                                                + "00000000001000";
                             else
                                 --flip sprite vertically.
                                 vram_addr <= "0" & ppu_ctrl(PPUSPA) & 

--- a/simulation/ppu/testbench_ppu.vhd
+++ b/simulation/ppu/testbench_ppu.vhd
@@ -180,7 +180,13 @@ begin
         for i in 0 to 32 * 5 loop
             cpu_addr <= "111";
             --cpu_d <= conv_std_logic_vector(i + 32, 8);
+            if (i mod 2 = 0) then
             cpu_d <= conv_std_logic_vector(37, 8);
+            else
+            --cpu_d <= conv_std_logic_vector(16#0d#, 8);
+            --cpu_d <= conv_std_logic_vector(36, 8);
+            cpu_d <= conv_std_logic_vector(38, 8);
+            end if;
             wait for cpu_clk_time;
         end loop;
 
@@ -273,7 +279,7 @@ begin
         cpu_d <= conv_std_logic_vector(16#11#, 8);
         wait for cpu_clk_time;
         --x
-        cpu_d <= conv_std_logic_vector(50, 8);
+        cpu_d <= conv_std_logic_vector(0, 8);
         wait for cpu_clk_time;
 
         --item #4
@@ -356,28 +362,28 @@ begin
 
         ce_n <= '1';
 
-        wait for 3 ms;
-        wait until (cpu_clk'event and cpu_clk = '1');
-
-        --disable show bg.
-        ce_n <= '0';
-        r_nw <= '0';
-        cpu_addr <= "001";
-        cpu_d <= "00000000";
-        wait for cpu_clk_time;
-        ce_n <= '1';
-
-        wait for 3 ms;
-        wait until (cpu_clk'event and cpu_clk = '1');
-
-        --enable show bg.
-        ce_n <= '0';
-        r_nw <= '0';
-        cpu_addr <= "001";
-        cpu_d <= "00011000";
-        wait for cpu_clk_time;
-        ce_n <= '1';
-
+--        wait for 3 ms;
+--        wait until (cpu_clk'event and cpu_clk = '1');
+--
+--        --disable show bg.
+--        ce_n <= '0';
+--        r_nw <= '0';
+--        cpu_addr <= "001";
+--        cpu_d <= "00000000";
+--        wait for cpu_clk_time;
+--        ce_n <= '1';
+--
+--        wait for 3 ms;
+--        wait until (cpu_clk'event and cpu_clk = '1');
+--
+--        --enable show bg.
+--        ce_n <= '0';
+--        r_nw <= '0';
+--        cpu_addr <= "001";
+--        cpu_d <= "00011000";
+--        wait for cpu_clk_time;
+--        ce_n <= '1';
+--
         --wait for vblank
         wait until (vblank_n'event and vblank_n = '0');
         wait until (cpu_clk'event and cpu_clk = '1');