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Revisionb76f21a70748b735d6ac84fec4bb9bdaafa339b1 (tree)
Time2015-08-25 03:14:30
AuthorLaurent Vivier <laurent@vivi...>
CommiterRichard Henderson

Log Message

linux-user: remove useless macros GUEST_BASE and RESERVED_VA

As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base
and the macros GUEST_BASE and RESERVED_VA become useless: replace
them by their values.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <1440420834-8388-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>

Change Summary

Incremental Difference

--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -163,10 +163,8 @@ static inline void tswap64s(uint64_t *s)
163163 extern unsigned long guest_base;
164164 extern int have_guest_base;
165165 extern unsigned long reserved_va;
166-#define GUEST_BASE guest_base
167-#define RESERVED_VA reserved_va
168166
169-#define GUEST_ADDR_MAX (RESERVED_VA ? RESERVED_VA : \
167+#define GUEST_ADDR_MAX (reserved_va ? reserved_va : \
170168 (1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
171169 #endif
172170
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -49,20 +49,20 @@
4949
5050 #if defined(CONFIG_USER_ONLY)
5151 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
52-#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
52+#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + guest_base))
5353
5454 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
5555 #define h2g_valid(x) 1
5656 #else
5757 #define h2g_valid(x) ({ \
58- unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
58+ unsigned long __guest = (unsigned long)(x) - guest_base; \
5959 (__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
60- (!RESERVED_VA || (__guest < RESERVED_VA)); \
60+ (!reserved_va || (__guest < reserved_va)); \
6161 })
6262 #endif
6363
6464 #define h2g_nocheck(x) ({ \
65- unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
65+ unsigned long __ret = (unsigned long)(x) - guest_base; \
6666 (abi_ulong)__ret; \
6767 })
6868
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -215,14 +215,14 @@ static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
215215 int prot;
216216 int looped = 0;
217217
218- if (size > RESERVED_VA) {
218+ if (size > reserved_va) {
219219 return (abi_ulong)-1;
220220 }
221221
222222 size = HOST_PAGE_ALIGN(size);
223223 end_addr = start + size;
224- if (end_addr > RESERVED_VA) {
225- end_addr = RESERVED_VA;
224+ if (end_addr > reserved_va) {
225+ end_addr = reserved_va;
226226 }
227227 addr = end_addr - qemu_host_page_size;
228228
@@ -231,7 +231,7 @@ static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
231231 if (looped) {
232232 return (abi_ulong)-1;
233233 }
234- end_addr = RESERVED_VA;
234+ end_addr = reserved_va;
235235 addr = end_addr - qemu_host_page_size;
236236 looped = 1;
237237 continue;
@@ -274,7 +274,7 @@ abi_ulong mmap_find_vma(abi_ulong start, abi_ulong size)
274274
275275 size = HOST_PAGE_ALIGN(size);
276276
277- if (RESERVED_VA) {
277+ if (reserved_va) {
278278 return mmap_find_vma_reserved(start, size);
279279 }
280280
@@ -667,7 +667,7 @@ int target_munmap(abi_ulong start, abi_ulong len)
667667 ret = 0;
668668 /* unmap what we can */
669669 if (real_start < real_end) {
670- if (RESERVED_VA) {
670+ if (reserved_va) {
671671 mmap_reserve(real_start, real_end - real_start);
672672 } else {
673673 ret = munmap(g2h(real_start), real_end - real_start);
@@ -697,7 +697,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
697697 flags,
698698 g2h(new_addr));
699699
700- if (RESERVED_VA && host_addr != MAP_FAILED) {
700+ if (reserved_va && host_addr != MAP_FAILED) {
701701 /* If new and old addresses overlap then the above mremap will
702702 already have failed with EINVAL. */
703703 mmap_reserve(old_addr, old_size);
@@ -715,13 +715,13 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
715715 old_size, new_size,
716716 flags | MREMAP_FIXED,
717717 g2h(mmap_start));
718- if ( RESERVED_VA ) {
718+ if (reserved_va) {
719719 mmap_reserve(old_addr, old_size);
720720 }
721721 }
722722 } else {
723723 int prot = 0;
724- if (RESERVED_VA && old_size < new_size) {
724+ if (reserved_va && old_size < new_size) {
725725 abi_ulong addr;
726726 for (addr = old_addr + old_size;
727727 addr < old_addr + new_size;
@@ -731,7 +731,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
731731 }
732732 if (prot == 0) {
733733 host_addr = mremap(g2h(old_addr), old_size, new_size, flags);
734- if (host_addr != MAP_FAILED && RESERVED_VA && old_size > new_size) {
734+ if (host_addr != MAP_FAILED && reserved_va && old_size > new_size) {
735735 mmap_reserve(old_addr + old_size, new_size - old_size);
736736 }
737737 } else {
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -30,7 +30,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
3030 static const int tcg_target_reg_alloc_order[] = {
3131 TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23,
3232 TCG_REG_X24, TCG_REG_X25, TCG_REG_X26, TCG_REG_X27,
33- TCG_REG_X28, /* we will reserve this for GUEST_BASE if configured */
33+ TCG_REG_X28, /* we will reserve this for guest_base if configured */
3434
3535 TCG_REG_X8, TCG_REG_X9, TCG_REG_X10, TCG_REG_X11,
3636 TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, TCG_REG_X15,
@@ -1225,7 +1225,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
12251225 s->code_ptr, label_ptr);
12261226 #else /* !CONFIG_SOFTMMU */
12271227 tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
1228- GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
1228+ guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
12291229 otype, addr_reg);
12301230 #endif /* CONFIG_SOFTMMU */
12311231 }
@@ -1246,7 +1246,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
12461246 data_reg, addr_reg, s->code_ptr, label_ptr);
12471247 #else /* !CONFIG_SOFTMMU */
12481248 tcg_out_qemu_st_direct(s, memop, data_reg,
1249- GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
1249+ guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
12501250 otype, addr_reg);
12511251 #endif /* CONFIG_SOFTMMU */
12521252 }
@@ -1806,8 +1806,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
18061806 CPU_TEMP_BUF_NLONGS * sizeof(long));
18071807
18081808 #if !defined(CONFIG_SOFTMMU)
1809- if (GUEST_BASE) {
1810- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, GUEST_BASE);
1809+ if (guest_base) {
1810+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);
18111811 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
18121812 }
18131813 #endif
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1493,8 +1493,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
14931493 add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
14941494 s->code_ptr, label_ptr);
14951495 #else /* !CONFIG_SOFTMMU */
1496- if (GUEST_BASE) {
1497- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, GUEST_BASE);
1496+ if (guest_base) {
1497+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, guest_base);
14981498 tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, TCG_REG_TMP);
14991499 } else {
15001500 tcg_out_qemu_ld_direct(s, opc, datalo, datahi, addrlo);
@@ -1623,8 +1623,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
16231623 add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
16241624 s->code_ptr, label_ptr);
16251625 #else /* !CONFIG_SOFTMMU */
1626- if (GUEST_BASE) {
1627- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, GUEST_BASE);
1626+ if (guest_base) {
1627+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, guest_base);
16281628 tcg_out_qemu_st_index(s, COND_AL, opc, datalo,
16291629 datahi, addrlo, TCG_REG_TMP);
16301630 } else {
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1432,7 +1432,7 @@ int arch_prctl(int code, unsigned long addr);
14321432 static int guest_base_flags;
14331433 static inline void setup_guest_base_seg(void)
14341434 {
1435- if (arch_prctl(ARCH_SET_GS, GUEST_BASE) == 0) {
1435+ if (arch_prctl(ARCH_SET_GS, guest_base) == 0) {
14361436 guest_base_flags = P_GS;
14371437 }
14381438 }
@@ -1577,7 +1577,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
15771577 s->code_ptr, label_ptr);
15781578 #else
15791579 {
1580- int32_t offset = GUEST_BASE;
1580+ int32_t offset = guest_base;
15811581 TCGReg base = addrlo;
15821582 int index = -1;
15831583 int seg = 0;
@@ -1586,7 +1586,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
15861586 We can do this with the ADDR32 prefix if we're not using
15871587 a guest base, or when using segmentation. Otherwise we
15881588 need to zero-extend manually. */
1589- if (GUEST_BASE == 0 || guest_base_flags) {
1589+ if (guest_base == 0 || guest_base_flags) {
15901590 seg = guest_base_flags;
15911591 offset = 0;
15921592 if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
@@ -1597,8 +1597,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
15971597 tcg_out_ext32u(s, TCG_REG_L0, base);
15981598 base = TCG_REG_L0;
15991599 }
1600- if (offset != GUEST_BASE) {
1601- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE);
1600+ if (offset != guest_base) {
1601+ tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
16021602 index = TCG_REG_L1;
16031603 offset = 0;
16041604 }
@@ -1717,12 +1717,12 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
17171717 s->code_ptr, label_ptr);
17181718 #else
17191719 {
1720- int32_t offset = GUEST_BASE;
1720+ int32_t offset = guest_base;
17211721 TCGReg base = addrlo;
17221722 int seg = 0;
17231723
17241724 /* See comment in tcg_out_qemu_ld re zero-extension of addrlo. */
1725- if (GUEST_BASE == 0 || guest_base_flags) {
1725+ if (guest_base == 0 || guest_base_flags) {
17261726 seg = guest_base_flags;
17271727 offset = 0;
17281728 if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
@@ -1731,12 +1731,12 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
17311731 } else if (TCG_TARGET_REG_BITS == 64) {
17321732 /* ??? Note that we can't use the same SIB addressing scheme
17331733 as for loads, since we require L0 free for bswap. */
1734- if (offset != GUEST_BASE) {
1734+ if (offset != guest_base) {
17351735 if (TARGET_LONG_BITS == 32) {
17361736 tcg_out_ext32u(s, TCG_REG_L0, base);
17371737 base = TCG_REG_L0;
17381738 }
1739- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE);
1739+ tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
17401740 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base);
17411741 base = TCG_REG_L1;
17421742 offset = 0;
@@ -2315,8 +2315,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
23152315 tcg_out_opc(s, OPC_RET, 0, 0, 0);
23162316
23172317 #if !defined(CONFIG_SOFTMMU)
2318- /* Try to set up a segment register to point to GUEST_BASE. */
2319- if (GUEST_BASE) {
2318+ /* Try to set up a segment register to point to guest_base. */
2319+ if (guest_base) {
23202320 setup_guest_base_seg();
23212321 }
23222322 #endif
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -43,9 +43,6 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
4343 #ifndef CONFIG_SOFTMMU
4444 #define TCG_GUEST_BASE_REG TCG_REG_R55
4545 #endif
46-#ifndef GUEST_BASE
47-#define GUEST_BASE 0
48-#endif
4946
5047 /* Branch registers */
5148 enum {
@@ -1763,7 +1760,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args)
17631760 bswap = opc & MO_BSWAP;
17641761
17651762 #if TARGET_LONG_BITS == 32
1766- if (GUEST_BASE != 0) {
1763+ if (guest_base != 0) {
17671764 tcg_out_bundle(s, mII,
17681765 INSN_NOP_M,
17691766 tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
@@ -1827,7 +1824,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args)
18271824 }
18281825 }
18291826 #else
1830- if (GUEST_BASE != 0) {
1827+ if (guest_base != 0) {
18311828 tcg_out_bundle(s, MmI,
18321829 tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
18331830 TCG_GUEST_BASE_REG, addr_reg),
@@ -1887,7 +1884,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
18871884 bswap = opc & MO_BSWAP;
18881885
18891886 #if TARGET_LONG_BITS == 32
1890- if (GUEST_BASE != 0) {
1887+ if (guest_base != 0) {
18911888 tcg_out_bundle(s, mII,
18921889 INSN_NOP_M,
18931890 tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29,
@@ -1933,7 +1930,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
19331930 INSN_NOP_M,
19341931 INSN_NOP_I);
19351932 #else
1936- if (GUEST_BASE != 0) {
1933+ if (guest_base != 0) {
19371934 add_guest_base = tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
19381935 TCG_GUEST_BASE_REG, addr_reg);
19391936 addr_reg = TCG_REG_R2;
@@ -1942,7 +1939,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args)
19421939 }
19431940
19441941 if (!bswap) {
1945- tcg_out_bundle(s, (GUEST_BASE ? MmI : mmI),
1942+ tcg_out_bundle(s, (guest_base ? MmI : mmI),
19461943 add_guest_base,
19471944 tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits],
19481945 data_reg, addr_reg),
@@ -2351,14 +2348,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
23512348 tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
23522349 TCG_REG_B6, TCG_REG_R33, 0));
23532350
2354- /* ??? If GUEST_BASE < 0x200000, we could load the register via
2351+ /* ??? If guest_base < 0x200000, we could load the register via
23552352 an ADDL in the M slot of the next bundle. */
2356- if (GUEST_BASE != 0) {
2353+ if (guest_base != 0) {
23572354 tcg_out_bundle(s, mlx,
23582355 INSN_NOP_M,
2359- tcg_opc_l2 (GUEST_BASE),
2356+ tcg_opc_l2(guest_base),
23602357 tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2,
2361- TCG_GUEST_BASE_REG, GUEST_BASE));
2358+ TCG_GUEST_BASE_REG, guest_base));
23622359 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
23632360 }
23642361
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -1180,12 +1180,12 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
11801180 add_qemu_ldst_label(s, 1, oi, data_regl, data_regh, addr_regl, addr_regh,
11811181 s->code_ptr, label_ptr);
11821182 #else
1183- if (GUEST_BASE == 0 && data_regl != addr_regl) {
1183+ if (guest_base == 0 && data_regl != addr_regl) {
11841184 base = addr_regl;
1185- } else if (GUEST_BASE == (int16_t)GUEST_BASE) {
1186- tcg_out_opc_imm(s, OPC_ADDIU, base, addr_regl, GUEST_BASE);
1185+ } else if (guest_base == (int16_t)guest_base) {
1186+ tcg_out_opc_imm(s, OPC_ADDIU, base, addr_regl, guest_base);
11871187 } else {
1188- tcg_out_movi(s, TCG_TYPE_PTR, base, GUEST_BASE);
1188+ tcg_out_movi(s, TCG_TYPE_PTR, base, guest_base);
11891189 tcg_out_opc_reg(s, OPC_ADDU, base, base, addr_regl);
11901190 }
11911191 tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc);
@@ -1314,14 +1314,14 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
13141314 add_qemu_ldst_label(s, 0, oi, data_regl, data_regh, addr_regl, addr_regh,
13151315 s->code_ptr, label_ptr);
13161316 #else
1317- if (GUEST_BASE == 0) {
1317+ if (guest_base == 0) {
13181318 base = addr_regl;
13191319 } else {
13201320 base = TCG_REG_A0;
1321- if (GUEST_BASE == (int16_t)GUEST_BASE) {
1322- tcg_out_opc_imm(s, OPC_ADDIU, base, addr_regl, GUEST_BASE);
1321+ if (guest_base == (int16_t)guest_base) {
1322+ tcg_out_opc_imm(s, OPC_ADDIU, base, addr_regl, guest_base);
13231323 } else {
1324- tcg_out_movi(s, TCG_TYPE_PTR, base, GUEST_BASE);
1324+ tcg_out_movi(s, TCG_TYPE_PTR, base, guest_base);
13251325 tcg_out_opc_reg(s, OPC_ADDU, base, base, addr_regl);
13261326 }
13271327 }
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -80,10 +80,6 @@
8080
8181 static tcg_insn_unit *tb_ret_addr;
8282
83-#ifndef GUEST_BASE
84-#define GUEST_BASE 0
85-#endif
86-
8783 #include "elf.h"
8884 static bool have_isa_2_06;
8985 #define HAVE_ISA_2_06 have_isa_2_06
@@ -1619,7 +1615,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
16191615
16201616 rbase = TCG_REG_R3;
16211617 #else /* !CONFIG_SOFTMMU */
1622- rbase = GUEST_BASE ? TCG_GUEST_BASE_REG : 0;
1618+ rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
16231619 if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
16241620 tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
16251621 addrlo = TCG_REG_TMP1;
@@ -1694,7 +1690,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
16941690
16951691 rbase = TCG_REG_R3;
16961692 #else /* !CONFIG_SOFTMMU */
1697- rbase = GUEST_BASE ? TCG_GUEST_BASE_REG : 0;
1693+ rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
16981694 if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
16991695 tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
17001696 addrlo = TCG_REG_TMP1;
@@ -1799,8 +1795,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
17991795 tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_R1, FRAME_SIZE+LR_OFFSET);
18001796
18011797 #ifndef CONFIG_SOFTMMU
1802- if (GUEST_BASE) {
1803- tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE);
1798+ if (guest_base) {
1799+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
18041800 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
18051801 }
18061802 #endif
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -57,11 +57,6 @@
5757 #define TCG_GUEST_BASE_REG TCG_REG_R0
5858 #endif
5959
60-#ifndef GUEST_BASE
61-#define GUEST_BASE 0
62-#endif
63-
64-
6560 /* All of the following instructions are prefixed with their instruction
6661 format, and are defined as 8- or 16-bit quantities, even when the two
6762 halves of the 16-bit quantity may appear 32 bits apart in the insn.
@@ -1638,9 +1633,9 @@ static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg,
16381633 tgen_ext32u(s, TCG_TMP0, *addr_reg);
16391634 *addr_reg = TCG_TMP0;
16401635 }
1641- if (GUEST_BASE < 0x80000) {
1636+ if (guest_base < 0x80000) {
16421637 *index_reg = TCG_REG_NONE;
1643- *disp = GUEST_BASE;
1638+ *disp = guest_base;
16441639 } else {
16451640 *index_reg = TCG_GUEST_BASE_REG;
16461641 *disp = 0;
@@ -2349,8 +2344,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
23492344 TCG_STATIC_CALL_ARGS_SIZE + TCG_TARGET_CALL_STACK_OFFSET,
23502345 CPU_TEMP_BUF_NLONGS * sizeof(long));
23512346
2352- if (GUEST_BASE >= 0x80000) {
2353- tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE);
2347+ if (guest_base >= 0x80000) {
2348+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
23542349 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
23552350 }
23562351
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -954,8 +954,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
954954 INSN_IMM13(-frame_size));
955955
956956 #ifndef CONFIG_SOFTMMU
957- if (GUEST_BASE != 0) {
958- tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE);
957+ if (guest_base != 0) {
958+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
959959 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
960960 }
961961 #endif
@@ -1144,7 +1144,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
11441144 addr = TCG_REG_T1;
11451145 }
11461146 tcg_out_ldst_rr(s, data, addr,
1147- (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
1147+ (guest_base ? TCG_GUEST_BASE_REG : TCG_REG_G0),
11481148 qemu_ld_opc[memop & (MO_BSWAP | MO_SSIZE)]);
11491149 #endif /* CONFIG_SOFTMMU */
11501150 }
@@ -1199,7 +1199,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
11991199 addr = TCG_REG_T1;
12001200 }
12011201 tcg_out_ldst_rr(s, data, addr,
1202- (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
1202+ (guest_base ? TCG_GUEST_BASE_REG : TCG_REG_G0),
12031203 qemu_st_opc[memop & (MO_BSWAP | MO_SIZE)]);
12041204 #endif /* CONFIG_SOFTMMU */
12051205 }