LPC8xx用シリアルコンソール
Revision | 4 (tree) |
---|---|
Time | 2018-04-08 07:27:07 |
Author | kmorimatsu |
(empty log message)
@@ -0,0 +1,23 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +/* | |
9 | + * 'vsyncture' is set to get proper video signal construction frequency. | |
10 | + * -4 <= vsynctune <= 4 | |
11 | + * After setting proper value, signal frequency of Pin #3 will be 16275 Hz. | |
12 | + * | |
13 | + */ | |
14 | +#define vsynctune 0 | |
15 | + | |
16 | +/* | |
17 | + * 101 and 106 keyboard are supported. | |
18 | + * Define either KEYBOARD101 or KEYBOARD106 | |
19 | + * | |
20 | + */ | |
21 | + | |
22 | +#define KEYBOARD101 | |
23 | +//#define KEYBOARD106 |
@@ -0,0 +1,337 @@ | ||
1 | +//***************************************************************************** | |
2 | +// LPC8xx Microcontroller Startup code for use with LPCXpresso IDE | |
3 | +// | |
4 | +// Version : 130808 | |
5 | +//***************************************************************************** | |
6 | +// | |
7 | +// Copyright(C) NXP Semiconductors, 2013 | |
8 | +// All rights reserved. | |
9 | +// | |
10 | +// Software that is described herein is for illustrative purposes only | |
11 | +// which provides customers with programming information regarding the | |
12 | +// LPC products. This software is supplied "AS IS" without any warranties of | |
13 | +// any kind, and NXP Semiconductors and its licensor disclaim any and | |
14 | +// all warranties, express or implied, including all implied warranties of | |
15 | +// merchantability, fitness for a particular purpose and non-infringement of | |
16 | +// intellectual property rights. NXP Semiconductors assumes no responsibility | |
17 | +// or liability for the use of the software, conveys no license or rights under any | |
18 | +// patent, copyright, mask work right, or any other intellectual property rights in | |
19 | +// or to any products. NXP Semiconductors reserves the right to make changes | |
20 | +// in the software without notification. NXP Semiconductors also makes no | |
21 | +// representation or warranty that such application will be suitable for the | |
22 | +// specified use without further testing or modification. | |
23 | +// | |
24 | +// Permission to use, copy, modify, and distribute this software and its | |
25 | +// documentation is hereby granted, under NXP Semiconductors' and its | |
26 | +// licensor's relevant copyrights in the software, without fee, provided that it | |
27 | +// is used in conjunction with NXP Semiconductors microcontrollers. This | |
28 | +// copyright, permission, and disclaimer notice must appear in all copies of | |
29 | +// this code. | |
30 | +//***************************************************************************** | |
31 | + | |
32 | +#if defined (__cplusplus) | |
33 | +#ifdef __REDLIB__ | |
34 | +#error Redlib does not support C++ | |
35 | +#else | |
36 | +//***************************************************************************** | |
37 | +// | |
38 | +// The entry point for the C++ library startup | |
39 | +// | |
40 | +//***************************************************************************** | |
41 | +extern "C" { | |
42 | + extern void __libc_init_array(void); | |
43 | +} | |
44 | +#endif | |
45 | +#endif | |
46 | + | |
47 | +#define WEAK __attribute__ ((weak)) | |
48 | +#define ALIAS(f) __attribute__ ((weak, alias (#f))) | |
49 | + | |
50 | +//***************************************************************************** | |
51 | +#if defined (__cplusplus) | |
52 | +extern "C" { | |
53 | +#endif | |
54 | + | |
55 | +//***************************************************************************** | |
56 | +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) | |
57 | +// Declaration of external SystemInit function | |
58 | +extern void SystemInit(void); | |
59 | +#endif | |
60 | + | |
61 | +//***************************************************************************** | |
62 | +// | |
63 | +// Forward declaration of the default handlers. These are aliased. | |
64 | +// When the application defines a handler (with the same name), this will | |
65 | +// automatically take precedence over these weak definitions | |
66 | +// | |
67 | +//***************************************************************************** | |
68 | + void ResetISR(void); | |
69 | +WEAK void NMI_Handler(void); | |
70 | +WEAK void HardFault_Handler(void); | |
71 | +WEAK void SVC_Handler(void); | |
72 | +WEAK void PendSV_Handler(void); | |
73 | +WEAK void SysTick_Handler(void); | |
74 | +WEAK void IntDefaultHandler(void); | |
75 | + | |
76 | +//***************************************************************************** | |
77 | +// | |
78 | +// Forward declaration of the specific IRQ handlers. These are aliased | |
79 | +// to the IntDefaultHandler, which is a 'forever' loop. When the application | |
80 | +// defines a handler (with the same name), this will automatically take | |
81 | +// precedence over these weak definitions | |
82 | +// | |
83 | +//***************************************************************************** | |
84 | +void SPI0_IRQHandler(void) ALIAS(IntDefaultHandler); | |
85 | +void SPI1_IRQHandler(void) ALIAS(IntDefaultHandler); | |
86 | +void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); | |
87 | +void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); | |
88 | +void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); | |
89 | +void I2C_IRQHandler(void) ALIAS(IntDefaultHandler); | |
90 | +void SCT_IRQHandler(void) ALIAS(IntDefaultHandler); | |
91 | +void MRT_IRQHandler(void) ALIAS(IntDefaultHandler); | |
92 | +void CMP_IRQHandler(void) ALIAS(IntDefaultHandler); | |
93 | +void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); | |
94 | +void BOD_IRQHandler(void) ALIAS(IntDefaultHandler); | |
95 | +void WKT_IRQHandler(void) ALIAS(IntDefaultHandler); | |
96 | +void PININT0_IRQHandler(void) ALIAS(IntDefaultHandler); | |
97 | +void PININT1_IRQHandler(void) ALIAS(IntDefaultHandler); | |
98 | +void PININT2_IRQHandler(void) ALIAS(IntDefaultHandler); | |
99 | +void PININT3_IRQHandler(void) ALIAS(IntDefaultHandler); | |
100 | +void PININT4_IRQHandler(void) ALIAS(IntDefaultHandler); | |
101 | +void PININT5_IRQHandler(void) ALIAS(IntDefaultHandler); | |
102 | +void PININT6_IRQHandler(void) ALIAS(IntDefaultHandler); | |
103 | +void PININT7_IRQHandler(void) ALIAS(IntDefaultHandler); | |
104 | +//***************************************************************************** | |
105 | +// | |
106 | +// The entry point for the application. | |
107 | +// __main() is the entry point for Redlib based applications | |
108 | +// main() is the entry point for Newlib based applications | |
109 | +// | |
110 | +//***************************************************************************** | |
111 | +#if defined (__REDLIB__) | |
112 | +extern void __main(void); | |
113 | +#else | |
114 | +extern int main(void); | |
115 | +#endif | |
116 | +//***************************************************************************** | |
117 | +// | |
118 | +// External declaration for the pointer to the stack top from the Linker Script | |
119 | +// | |
120 | +//***************************************************************************** | |
121 | +extern void _vStackTop(void); | |
122 | + | |
123 | +//***************************************************************************** | |
124 | +#if defined (__cplusplus) | |
125 | +} // extern "C" | |
126 | +#endif | |
127 | +//***************************************************************************** | |
128 | +// | |
129 | +// The vector table. | |
130 | +// This relies on the linker script to place at correct location in memory. | |
131 | +// | |
132 | +//***************************************************************************** | |
133 | +extern void (* const g_pfnVectors[])(void); | |
134 | +__attribute__ ((section(".isr_vector"))) | |
135 | +void (* const g_pfnVectors[])(void) = { | |
136 | + // Core Level - CM0plus | |
137 | + &_vStackTop, // The initial stack pointer | |
138 | + ResetISR, // The reset handler | |
139 | + NMI_Handler, // The NMI handler | |
140 | + HardFault_Handler, // The hard fault handler | |
141 | + 0, // Reserved | |
142 | + 0, // Reserved | |
143 | + 0, // Reserved | |
144 | + 0, // Reserved | |
145 | + 0, // Reserved | |
146 | + 0, // Reserved | |
147 | + 0, // Reserved | |
148 | + SVC_Handler, // SVCall handler | |
149 | + 0, // Reserved | |
150 | + 0, // Reserved | |
151 | + PendSV_Handler, // The PendSV handler | |
152 | + SysTick_Handler, // The SysTick handler | |
153 | + | |
154 | + // Chip Level - LPC8xx | |
155 | + SPI0_IRQHandler, // SPI0 controller | |
156 | + SPI1_IRQHandler, // SPI1 controller | |
157 | + 0, // Reserved | |
158 | + UART0_IRQHandler, // UART0 | |
159 | + UART1_IRQHandler, // UART1 | |
160 | + UART2_IRQHandler, // UART2 | |
161 | + 0, // Reserved | |
162 | + 0, // Reserved | |
163 | + I2C_IRQHandler, // I2C controller | |
164 | + SCT_IRQHandler, // Smart Counter Timer | |
165 | + MRT_IRQHandler, // Multi-Rate Timer | |
166 | + CMP_IRQHandler, // Comparator | |
167 | + WDT_IRQHandler, // PIO1 (0:11) | |
168 | + BOD_IRQHandler, // Brown Out Detect | |
169 | + 0, // Reserved | |
170 | + WKT_IRQHandler, // Wakeup timer | |
171 | + 0, // Reserved | |
172 | + 0, // Reserved | |
173 | + 0, // Reserved | |
174 | + 0, // Reserved | |
175 | + 0, // Reserved | |
176 | + 0, // Reserved | |
177 | + 0, // Reserved | |
178 | + 0, // Reserved | |
179 | + PININT0_IRQHandler, // PIO INT0 | |
180 | + PININT1_IRQHandler, // PIO INT1 | |
181 | + PININT2_IRQHandler, // PIO INT2 | |
182 | + PININT3_IRQHandler, // PIO INT3 | |
183 | + PININT4_IRQHandler, // PIO INT4 | |
184 | + PININT5_IRQHandler, // PIO INT5 | |
185 | + PININT6_IRQHandler, // PIO INT6 | |
186 | + PININT7_IRQHandler, // PIO INT7 | |
187 | +}; /* End of g_pfnVectors */ | |
188 | + | |
189 | +//***************************************************************************** | |
190 | +// Functions to carry out the initialization of RW and BSS data sections. These | |
191 | +// are written as separate functions rather than being inlined within the | |
192 | +// ResetISR() function in order to cope with MCUs with multiple banks of | |
193 | +// memory. | |
194 | +//***************************************************************************** | |
195 | +__attribute__ ((section(".after_vectors"))) | |
196 | +void data_init(unsigned int romstart, unsigned int start, unsigned int len) { | |
197 | + unsigned int *pulDest = (unsigned int*) start; | |
198 | + unsigned int *pulSrc = (unsigned int*) romstart; | |
199 | + unsigned int loop; | |
200 | + for (loop = 0; loop < len; loop = loop + 4) | |
201 | + *pulDest++ = *pulSrc++; | |
202 | +} | |
203 | + | |
204 | +__attribute__ ((section(".after_vectors"))) | |
205 | +void bss_init(unsigned int start, unsigned int len) { | |
206 | + unsigned int *pulDest = (unsigned int*) start; | |
207 | + unsigned int loop; | |
208 | + for (loop = 0; loop < len; loop = loop + 4) | |
209 | + *pulDest++ = 0; | |
210 | +} | |
211 | + | |
212 | +//***************************************************************************** | |
213 | +// The following symbols are constructs generated by the linker, indicating | |
214 | +// the location of various points in the "Global Section Table". This table is | |
215 | +// created by the linker via the Code Red managed linker script mechanism. It | |
216 | +// contains the load address, execution address and length of each RW data | |
217 | +// section and the execution and length of each BSS (zero initialized) section. | |
218 | +//***************************************************************************** | |
219 | +extern unsigned int __data_section_table; | |
220 | +extern unsigned int __data_section_table_end; | |
221 | +extern unsigned int __bss_section_table; | |
222 | +extern unsigned int __bss_section_table_end; | |
223 | + | |
224 | + | |
225 | +//***************************************************************************** | |
226 | +// Reset entry point for your code. | |
227 | +// Sets up a simple runtime environment and initializes the C/C++ | |
228 | +// library. | |
229 | +//***************************************************************************** | |
230 | +__attribute__ ((section(".after_vectors"))) | |
231 | +void | |
232 | +ResetISR(void) { | |
233 | + | |
234 | + // | |
235 | + // Copy the data sections from flash to SRAM. | |
236 | + // | |
237 | + unsigned int LoadAddr, ExeAddr, SectionLen; | |
238 | + unsigned int *SectionTableAddr; | |
239 | + | |
240 | + // Load base address of Global Section Table | |
241 | + SectionTableAddr = &__data_section_table; | |
242 | + | |
243 | + // Copy the data sections from flash to SRAM. | |
244 | + while (SectionTableAddr < &__data_section_table_end) { | |
245 | + LoadAddr = *SectionTableAddr++; | |
246 | + ExeAddr = *SectionTableAddr++; | |
247 | + SectionLen = *SectionTableAddr++; | |
248 | + data_init(LoadAddr, ExeAddr, SectionLen); | |
249 | + } | |
250 | + // At this point, SectionTableAddr = &__bss_section_table; | |
251 | + // Zero fill the bss segment | |
252 | + while (SectionTableAddr < &__bss_section_table_end) { | |
253 | + ExeAddr = *SectionTableAddr++; | |
254 | + SectionLen = *SectionTableAddr++; | |
255 | + bss_init(ExeAddr, SectionLen); | |
256 | + } | |
257 | +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) | |
258 | + SystemInit(); | |
259 | +#endif | |
260 | + | |
261 | +#if defined (__cplusplus) | |
262 | + // | |
263 | + // Call C++ library initialisation | |
264 | + // | |
265 | + __libc_init_array(); | |
266 | +#endif | |
267 | + | |
268 | +#if defined (__REDLIB__) | |
269 | + // Call the Redlib library, which in turn calls main() | |
270 | + __main() ; | |
271 | +#else | |
272 | + main(); | |
273 | +#endif | |
274 | + | |
275 | + // | |
276 | + // main() shouldn't return, but if it does, we'll just enter an infinite loop | |
277 | + // | |
278 | + while (1) { | |
279 | + ; | |
280 | + } | |
281 | +} | |
282 | + | |
283 | +//***************************************************************************** | |
284 | +// Default exception handlers. Override the ones here by defining your own | |
285 | +// handler routines in your application code. | |
286 | +//***************************************************************************** | |
287 | +__attribute__ ((section(".after_vectors"))) | |
288 | +void NMI_Handler(void) | |
289 | +{ | |
290 | + while(1) | |
291 | + { | |
292 | + } | |
293 | +} | |
294 | +__attribute__ ((section(".after_vectors"))) | |
295 | +void HardFault_Handler(void) | |
296 | +{ | |
297 | + while(1) | |
298 | + { | |
299 | + } | |
300 | +} | |
301 | +__attribute__ ((section(".after_vectors"))) | |
302 | +void SVC_Handler(void) | |
303 | +{ | |
304 | + while(1) | |
305 | + { | |
306 | + } | |
307 | +} | |
308 | +__attribute__ ((section(".after_vectors"))) | |
309 | +void PendSV_Handler(void) | |
310 | +{ | |
311 | + while(1) | |
312 | + { | |
313 | + } | |
314 | +} | |
315 | +__attribute__ ((section(".after_vectors"))) | |
316 | +void SysTick_Handler(void) | |
317 | +{ | |
318 | + while(1) | |
319 | + { | |
320 | + } | |
321 | +} | |
322 | + | |
323 | +//***************************************************************************** | |
324 | +// | |
325 | +// Processor ends up here if an unexpected interrupt occurs or a specific | |
326 | +// handler is not present in the application code. | |
327 | +// | |
328 | +//***************************************************************************** | |
329 | +__attribute__ ((section(".after_vectors"))) | |
330 | +void IntDefaultHandler(void) | |
331 | +{ | |
332 | + while(1) | |
333 | + { | |
334 | + } | |
335 | +} | |
336 | + | |
337 | + |
@@ -0,0 +1,173 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +#include "./prototypes.h" | |
9 | + | |
10 | +volatile unsigned char vram[768]; | |
11 | + | |
12 | +int g_cursor=0; | |
13 | +unsigned char g_cursor_char=0; | |
14 | +int g_blink_cursor_counter=2048; | |
15 | + | |
16 | +inline void blink_cursor(){ | |
17 | + if (2048<=g_blink_cursor_counter) { | |
18 | + if (g_blink_cursor_counter & 1) { | |
19 | + vram[g_cursor]=g_cursor_char; | |
20 | + g_blink_cursor_counter=0; | |
21 | + } else { | |
22 | + vram[g_cursor]=0x5f; | |
23 | + g_blink_cursor_counter=1; | |
24 | + } | |
25 | + } else { | |
26 | + g_blink_cursor_counter+=2; | |
27 | + } | |
28 | +} | |
29 | + | |
30 | +inline void print_char(unsigned char ascii){ | |
31 | + static unsigned char prev_ascii=0; | |
32 | + // Reset cursor blinking | |
33 | + g_blink_cursor_counter=2048; | |
34 | + vram[g_cursor]=g_cursor_char; | |
35 | + // Investigate ascii code | |
36 | + switch(ascii){ | |
37 | + case 0x00: // Null | |
38 | + break; | |
39 | + case 0x07: // Bell | |
40 | + // Currently do nothing. | |
41 | + break; | |
42 | + case 0x0a: // LF | |
43 | + if (prev_ascii==0x0d) break; // Ignore if the previous ascii code is CR (0x0d). | |
44 | + case 0x0d: // CR | |
45 | + g_cursor&=~(32-1); | |
46 | + g_cursor+=32; | |
47 | + break; | |
48 | + case 0x08: // BS | |
49 | + g_cursor--; | |
50 | + if (g_cursor<0) g_cursor=0; | |
51 | + vram[g_cursor]=0; | |
52 | + break; | |
53 | + case 0x7f: // DEL | |
54 | + // Currently do nowhing. | |
55 | + break; | |
56 | + case 0x11: // left | |
57 | + if (0<g_cursor) g_cursor--; | |
58 | + break; | |
59 | + case 0x12: // up | |
60 | + if (32<=g_cursor) g_cursor-=32; | |
61 | + break; | |
62 | + case 0x13: // right | |
63 | + g_cursor++; | |
64 | + break; | |
65 | + case 0x14: // down | |
66 | + g_cursor+=32; | |
67 | + break; | |
68 | + default: | |
69 | + if (0x20<=ascii && ascii<0x80) { | |
70 | + // Valid character. | |
71 | + // Let's convert to graphic code | |
72 | + ascii-=0x20; | |
73 | + } else { | |
74 | + // Invalid character. Show '?' | |
75 | + ascii=0x1f; | |
76 | + } | |
77 | + // Show the character at the cursor position. | |
78 | + vram[g_cursor]=ascii; | |
79 | + // Shift the cursor. | |
80 | + g_cursor++; | |
81 | + break; | |
82 | + } | |
83 | + // Check if scroll up is needed. | |
84 | + if ((32*24-1)<g_cursor) { | |
85 | + int i; | |
86 | + // Scroll up | |
87 | + for(i=0;i<32*(24-1);i++){ | |
88 | + vram[i]=vram[i+32]; | |
89 | + } | |
90 | + // Clear the last line. | |
91 | + for(i=32*(24-1);i<(32*24);i++){ | |
92 | + vram[i]=0; | |
93 | + } | |
94 | + // Set the cursor position to lower left. | |
95 | + g_cursor=32*(24-1); | |
96 | + } | |
97 | + prev_ascii=ascii; | |
98 | + g_cursor_char=vram[g_cursor]; | |
99 | +} | |
100 | + | |
101 | + | |
102 | +/* | |
103 | + * The following cgrom data is constructed by using 'Misaki' 8x8 font. | |
104 | + * http://www.geocities.jp/littlimi/misaki.htm | |
105 | + * | |
106 | + */ | |
107 | + | |
108 | +const unsigned char cgrom[]={ | |
109 | + | |
110 | + // line #0 | |
111 | + 0x00,0x10,0xd8,0x14,0x08,0x42,0x30,0xc0,0x02,0x80,0x10,0x10,0x00,0x00,0x00,0x02, | |
112 | + 0x3c,0x10,0x3c,0x3c,0x04,0x7e,0x3c,0x7e,0x3c,0x3c,0x00,0x00,0x02,0x00,0x80,0x3c, | |
113 | + 0x38,0x10,0x7c,0x1c,0x78,0x7e,0x7e,0x1c,0x42,0x38,0x02,0x42,0x40,0x82,0x42,0x18, | |
114 | + 0x7c,0x18,0x7c,0x3c,0xfe,0x42,0x82,0x82,0x82,0x82,0x7e,0x0e,0x80,0xe0,0x10,0x00, | |
115 | + 0x20,0x00,0x40,0x00,0x04,0x00,0x0c,0x00,0x40,0x10,0x08,0x20,0x30,0x00,0x00,0x00, | |
116 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x10,0xc0,0x00,0xaa, | |
117 | + | |
118 | + // line #1 | |
119 | + 0x00,0x10,0x48,0x7e,0x3e,0xa4,0x48,0x40,0x04,0x40,0x54,0x10,0x00,0x00,0x00,0x04, | |
120 | + 0x42,0x30,0x42,0x42,0x0c,0x40,0x42,0x02,0x42,0x42,0x30,0x30,0x04,0x00,0x40,0x42, | |
121 | + 0x44,0x28,0x42,0x22,0x44,0x40,0x40,0x22,0x42,0x10,0x02,0x44,0x40,0xc6,0x62,0x24, | |
122 | + 0x42,0x24,0x42,0x42,0x10,0x42,0x82,0x92,0x44,0x44,0x02,0x08,0x40,0x20,0x28,0x00, | |
123 | + 0x10,0x00,0x40,0x00,0x04,0x00,0x10,0x00,0x40,0x00,0x00,0x20,0x10,0x00,0x00,0x00, | |
124 | + 0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x10,0x20,0x00,0x55, | |
125 | + | |
126 | + // line #2 | |
127 | + 0x00,0x10,0x90,0x28,0x48,0x48,0x50,0x80,0x08,0x20,0x38,0x10,0x00,0x00,0x00,0x08, | |
128 | + 0x42,0x10,0x02,0x02,0x14,0x7c,0x40,0x04,0x42,0x42,0x30,0x30,0x08,0xfe,0x20,0x02, | |
129 | + 0x9a,0x28,0x42,0x40,0x42,0x40,0x40,0x40,0x42,0x10,0x02,0x48,0x40,0xaa,0x52,0x42, | |
130 | + 0x42,0x42,0x42,0x40,0x10,0x42,0x44,0x92,0x28,0x28,0x04,0x08,0x20,0x20,0x00,0x00, | |
131 | + 0x00,0x38,0x58,0x38,0x34,0x38,0x38,0x3c,0x58,0x10,0x08,0x24,0x10,0x68,0x58,0x38, | |
132 | + 0x78,0x3c,0x58,0x3c,0x78,0x44,0x44,0x44,0x44,0x44,0x7c,0x08,0x10,0x20,0x60,0xaa, | |
133 | + | |
134 | + // line #3 | |
135 | + 0x00,0x10,0x00,0x28,0x3c,0x10,0x24,0x00,0x08,0x20,0x10,0xfe,0x00,0xfe,0x00,0x10, | |
136 | + 0x42,0x10,0x0c,0x1c,0x24,0x42,0x7c,0x08,0x3c,0x3e,0x00,0x00,0x10,0x00,0x10,0x0c, | |
137 | + 0xaa,0x44,0x7c,0x40,0x42,0x7c,0x7c,0x4e,0x7e,0x10,0x02,0x50,0x40,0xaa,0x4a,0x42, | |
138 | + 0x7c,0x42,0x7c,0x3c,0x10,0x42,0x44,0xaa,0x10,0x10,0x08,0x08,0x10,0x20,0x00,0x00, | |
139 | + 0x00,0x04,0x64,0x44,0x4c,0x44,0x10,0x44,0x64,0x10,0x08,0x28,0x10,0x54,0x64,0x44, | |
140 | + 0x44,0x44,0x64,0x40,0x20,0x44,0x44,0x54,0x28,0x28,0x08,0x10,0x10,0x10,0x92,0x55, | |
141 | + | |
142 | + // line #4 | |
143 | + 0x00,0x10,0x00,0x28,0x12,0x24,0x54,0x00,0x08,0x20,0x38,0x10,0xc0,0x00,0x00,0x20, | |
144 | + 0x42,0x10,0x30,0x02,0x44,0x02,0x42,0x08,0x42,0x02,0x30,0x30,0x08,0xfe,0x20,0x10, | |
145 | + 0xb4,0x7c,0x42,0x40,0x42,0x40,0x40,0x42,0x42,0x10,0x02,0x68,0x40,0x92,0x46,0x42, | |
146 | + 0x40,0x4a,0x48,0x02,0x10,0x42,0x28,0xaa,0x28,0x10,0x10,0x08,0x08,0x20,0x00,0x00, | |
147 | + 0x00,0x3c,0x44,0x40,0x44,0x7c,0x10,0x3c,0x44,0x10,0x08,0x30,0x10,0x54,0x44,0x44, | |
148 | + 0x78,0x3c,0x40,0x38,0x20,0x44,0x28,0x54,0x10,0x28,0x10,0x08,0x10,0x20,0x0c,0xaa, | |
149 | + | |
150 | + // line #5 | |
151 | + 0x00,0x00,0x00,0xfc,0x7c,0x4a,0x88,0x00,0x04,0x40,0x54,0x10,0x40,0x00,0xc0,0x40, | |
152 | + 0x42,0x10,0x40,0x42,0x7e,0x42,0x42,0x10,0x42,0x42,0x30,0x10,0x04,0x00,0x40,0x00, | |
153 | + 0x40,0x82,0x42,0x22,0x44,0x40,0x40,0x22,0x42,0x10,0x42,0x44,0x40,0x92,0x42,0x24, | |
154 | + 0x40,0x24,0x44,0x42,0x10,0x42,0x28,0x44,0x44,0x10,0x20,0x08,0x04,0x20,0x00,0x00, | |
155 | + 0x00,0x44,0x44,0x44,0x44,0x40,0x10,0x04,0x44,0x10,0x48,0x28,0x10,0x54,0x44,0x44, | |
156 | + 0x40,0x04,0x40,0x04,0x24,0x4c,0x28,0x28,0x28,0x10,0x20,0x08,0x10,0x20,0x00,0x55, | |
157 | + | |
158 | + // line #6 | |
159 | + 0x00,0x10,0x00,0x50,0x10,0x84,0x76,0x00,0x02,0x80,0x10,0x10,0x80,0x00,0xc0,0x80, | |
160 | + 0x3c,0x38,0x7e,0x3c,0x04,0x3c,0x3c,0x10,0x3c,0x3c,0x00,0x20,0x02,0x00,0x80,0x10, | |
161 | + 0x38,0x82,0x7c,0x1c,0x78,0x7e,0x40,0x1c,0x42,0x38,0x3c,0x42,0x7e,0x82,0x42,0x18, | |
162 | + 0x40,0x1a,0x42,0x3c,0x10,0x3c,0x10,0x44,0x82,0x10,0x7e,0x0e,0x02,0xe0,0x00,0xfe, | |
163 | + 0x00,0x3c,0x78,0x38,0x3c,0x38,0x10,0x38,0x44,0x10,0x30,0x24,0x10,0x54,0x44,0x38, | |
164 | + 0x40,0x04,0x40,0x78,0x18,0x34,0x10,0x28,0x44,0x60,0x7c,0x06,0x10,0xc0,0x00,0xaa, | |
165 | + | |
166 | + // line #7 | |
167 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
168 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
169 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
170 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
171 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
172 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x55, | |
173 | +}; |
@@ -0,0 +1,98 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +#include "LPC8xx.h" | |
9 | +#include "./prototypes.h" | |
10 | + | |
11 | +/* Configure for 24 MHz internal clock. | |
12 | + * Copy and paste following lines to system_LPC8xx.c | |
13 | +#define CLOCK_SETUP 1 | |
14 | +#define SYSOSCCTRL_Val 0x00000000 // Reset: 0x000 | |
15 | +#define WDTOSCCTRL_Val 0x00000000 // Reset: 0x000 | |
16 | +#define SYSPLLCTRL_Val 0x00000001 // Reset: 0x000 | |
17 | +#define SYSPLLCLKSEL_Val 0x00000000 // Reset: 0x000 | |
18 | +#define MAINCLKSEL_Val 0x00000003 // Reset: 0x000 | |
19 | +#define SYSAHBCLKDIV_Val 0x00000001 // Reset: 0x001 | |
20 | + */ | |
21 | + | |
22 | +int main(void) { | |
23 | + // Force the counter to be placed into memory | |
24 | + volatile static int i = 0 ; | |
25 | + // Wait for ~1 second for possible programming (is this required?). | |
26 | + for(i=0;i<2097152;i++); | |
27 | + | |
28 | + // Switch matrix settings | |
29 | + /* Enable SWM clock */ | |
30 | + LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7); | |
31 | + /* U0_TXD at P0.0 */ | |
32 | + /* U0_RXD at p0.4 */ | |
33 | + LPC_SWM->PINASSIGN0 = 0xffff0004; | |
34 | + /* SPI0_MOSI at P0.2*/ | |
35 | + LPC_SWM->PINASSIGN4 = 0xffffff02; | |
36 | + /* SCT CTOUT_0 at P0.3*/ | |
37 | + LPC_SWM->PINASSIGN6 = 0x03ffffff; | |
38 | + /* Pin Assign 1 bit Configuration */ | |
39 | + LPC_SWM->PINENABLE0 = 0xffffffff; | |
40 | + /* Switch Matrix can be disabled to save current */ | |
41 | + LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<7); | |
42 | + | |
43 | + // Note; P0.1 (pin #5) and P0.5 (pin #1) are input GPIO with pull-up in default. | |
44 | + | |
45 | + // Initialize NTSC | |
46 | + ntsc_init(); | |
47 | + | |
48 | + // Initialize UART | |
49 | + uart_init(); | |
50 | + | |
51 | + // Main loop | |
52 | + while(1) { | |
53 | + int videoline=g_videoline; | |
54 | + if (44<=videoline && videoline<=236) { | |
55 | + // Disable input from PS/2 keyboard when generating video signal. | |
56 | + // Note that video signal outputs in lines 45-236. | |
57 | + disallow_ps2(); | |
58 | + } else { | |
59 | + // Enable input from PS/2 keyboard when not generating video signal. | |
60 | + allow_ps2(); | |
61 | + } | |
62 | + switch(videoline & 3){ | |
63 | + case 0: | |
64 | + // Serial output if PS/2 signal has been completed. | |
65 | + // This happens every 11 lines in maximum PS/2 keyboard speed. | |
66 | + completed_ps2(); | |
67 | + break; | |
68 | + case 1: | |
69 | + // Check serial output | |
70 | + // This happens every 11 lines in maximum PS/2 keyboard speed. | |
71 | + check_txdata(); | |
72 | + break; | |
73 | + case 2: | |
74 | + // Check serial input | |
75 | + // This happens every 16 lines in maximum frequency of UART input. | |
76 | + check_rxdata(); | |
77 | + break; | |
78 | + case 3: | |
79 | + // Blink cursor | |
80 | + blink_cursor(); | |
81 | + break; | |
82 | + } | |
83 | + // Remaining time is dedicated to receiving PS/2 signal. | |
84 | + // PS/2 signal comes every line in maximum PS/2 keyboard speed. | |
85 | + // Therefore, to receive correct data just after falling clock signal from PS/2 keyboard, | |
86 | + // the PS/2 signal must be checked more than twice in a line, i.e. before changing data signal. | |
87 | + while(LPC_SCT->COUNT_H < 750){ | |
88 | + // Check PS/2 signal until the half of line | |
89 | + check_ps2(); | |
90 | + } | |
91 | + while(750<=LPC_SCT->COUNT_H){ | |
92 | + // Check PS/2 signal until the end of line | |
93 | + check_ps2(); | |
94 | + } | |
95 | + } | |
96 | + return 0 ; | |
97 | +} | |
98 | + |
@@ -0,0 +1,159 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +#include "LPC8xx.h" | |
9 | + | |
10 | +#include "./sct_fsm.h" | |
11 | + | |
12 | +#include "./prototypes.h" | |
13 | +#include "./config.h" | |
14 | + | |
15 | +#define vsync1523 (1523+(vsynctune)*4) | |
16 | +#define vsync54 (54) | |
17 | +#define vsync761 (761+(vsynctune)*2) | |
18 | +#define vsync816 (816+(vsynctune)*2) | |
19 | +#define vsync648 (648+(vsynctune)*2) | |
20 | +#define vsync1410 (1410+(vsynctune)*4) | |
21 | +#define vsync112 (112) | |
22 | + | |
23 | +volatile int g_videoline=0; | |
24 | + | |
25 | + | |
26 | +/* Video sync signal construction | |
27 | + * 1 line: 1524 (+/- 16) clocks (15748 Hz; 63.5 usec) | |
28 | + * | |
29 | + * line #0-#2 | |
30 | + * ________ ________ | |
31 | + * |__| |__| | |
32 | + * 2.3 usec 2.3 usec | |
33 | + * | | | | |
34 | + * 55 761 816 | |
35 | + * | |
36 | + * | |
37 | + * line #3-#5 | |
38 | + * ___ ___ | |
39 | + * |_______| |_______| | |
40 | + * 4.7 usec 4.7 usec | |
41 | + * | | | | |
42 | + * 648 761 1410 | |
43 | + * | |
44 | + * line #6-#8 | |
45 | + * ________ ________ | |
46 | + * |__| |__| | |
47 | + * 2.3 usec 2.3 usec | |
48 | + * | | | | |
49 | + * 55 761 816 | |
50 | + * | |
51 | + * line #9-#261 | |
52 | + * ___________________ | |
53 | + * |___| | |
54 | + * 4.7 usec | |
55 | + * | | |
56 | + * 112 | |
57 | + * | |
58 | + * This must produces 16275 Hz sync signal. | |
59 | + * | |
60 | + */ | |
61 | + | |
62 | +void ntsc_init(void) { | |
63 | + // enable the SCT and SPI clocks | |
64 | + LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8) | (1<<11); | |
65 | + | |
66 | + // Initialize video sync routines using SCT | |
67 | + sct_fsm_init (); | |
68 | + LPC_SCT->MATCH_L[1] = vsync54; | |
69 | + LPC_SCT->MATCHREL_L[1] = vsync54; | |
70 | + LPC_SCT->MATCH_L[2] = vsync761; | |
71 | + LPC_SCT->MATCHREL_L[2] = vsync761; | |
72 | + LPC_SCT->MATCH_L[3] = vsync1410; | |
73 | + LPC_SCT->MATCHREL_L[3] = vsync1410; | |
74 | + LPC_SCT->MATCH_L[0] = vsync1410+1; | |
75 | + LPC_SCT->MATCHREL_L[0] = vsync1410+1; | |
76 | + LPC_SCT->MATCH_H[0] = vsync1523; | |
77 | + LPC_SCT->MATCHREL_H[0] = vsync1523; | |
78 | + | |
79 | + // Enable SCT interrupt | |
80 | + NVIC_EnableIRQ(SCT_IRQn); | |
81 | + | |
82 | + // unhalt the SCT by clearing bit 2 and bit 18 of the unified CTRL register | |
83 | + LPC_SCT->CTRL_U &= ~((1<<2) | (1<<18)); | |
84 | + | |
85 | + // SPI initialization | |
86 | + LPC_SPI0->DIV = 4-1; //SPI bitrate = system clock/4 (6 MHz) | |
87 | + LPC_SPI0->DLY = 0; //no added delays | |
88 | + LPC_SPI0->INTENCLR = 0x3F; //disable all interrupts | |
89 | + LPC_SPI0->TXCTRL = (16-1)<<24 | 1<<22; //16 bit frame,ignore RX data | |
90 | + LPC_SPI0->CFG = 0<<8 | 0<<7 | 0<<5 | 0<<4 | 0<<3 | 1<<2 | 1<<0; //SSEL=0,no loop,CPOL=0,CPHA=0,MSB,master,enable | |
91 | + //NVIC_EnableIRQ(SPI0_IRQn); //Don't use SPI0 interrupts | |
92 | + | |
93 | + // Initialize VRAM | |
94 | + int i; | |
95 | + for (i=0;i<768;i++){ | |
96 | + //vram[i]=i%0x60; | |
97 | + vram[i]=0; | |
98 | + } | |
99 | + | |
100 | +} | |
101 | + | |
102 | +void SCT_IRQHandler (void) { | |
103 | + uint32_t status = LPC_SCT->EVFLAG; | |
104 | + | |
105 | + // Control sync signal timing. | |
106 | + switch (g_videoline) { | |
107 | + case 0: | |
108 | + LPC_SCT->MATCH_L[1] = vsync54; | |
109 | + LPC_SCT->MATCHREL_L[1] = vsync54; | |
110 | + LPC_SCT->MATCH_L[0] = vsync1410+1; | |
111 | + LPC_SCT->MATCHREL_L[0] = vsync1410+1; | |
112 | + break; | |
113 | + case 3: | |
114 | + LPC_SCT->MATCH_L[1] = vsync648; | |
115 | + LPC_SCT->MATCHREL_L[1] = vsync648; | |
116 | + LPC_SCT->MATCH_L[3] = vsync1410; | |
117 | + LPC_SCT->MATCHREL_L[3] = vsync1410; | |
118 | + break; | |
119 | + case 6: | |
120 | + LPC_SCT->MATCH_L[1] = vsync54; | |
121 | + LPC_SCT->MATCHREL_L[1] = vsync54; | |
122 | + LPC_SCT->MATCH_L[3] = vsync816; | |
123 | + LPC_SCT->MATCHREL_L[3] = vsync816; | |
124 | + break; | |
125 | + case 9: | |
126 | + LPC_SCT->MATCH_L[1] = vsync112; | |
127 | + LPC_SCT->MATCHREL_L[1] = vsync112; | |
128 | + LPC_SCT->MATCH_L[0] = vsync112+80; // Can be between 112 and 761 | |
129 | + LPC_SCT->MATCHREL_L[0] = vsync112+80; // Can be tuned for the timing of video signal | |
130 | + break; | |
131 | + case 10: | |
132 | + // Initialize video interrupt routine here if something is required. | |
133 | + // Video signal will start from line #45 | |
134 | + break; | |
135 | + } | |
136 | + | |
137 | + // Video signal construction. | |
138 | + if (45<=g_videoline && g_videoline<=236) { | |
139 | + int videoline=g_videoline-45; | |
140 | + volatile unsigned char* vrampos=vram+((videoline>>3)<<5); | |
141 | + const unsigned char* cgromline=cgrom+((videoline%8)*0x60); | |
142 | + int i; | |
143 | + for(i=0;i<16;i++){ | |
144 | + LPC_SPI0->TXDAT = ((cgromline[vrampos[0]])<<8) | cgromline[vrampos[1]]; | |
145 | + vrampos+=2; | |
146 | + // Wait until buffer will be available. | |
147 | + while (!(LPC_SPI0->STAT&2)){} | |
148 | + } | |
149 | + // Send blank data after last character. | |
150 | + LPC_SPI0->TXDAT =0; | |
151 | + } | |
152 | + | |
153 | + // Increment line number and exit function. | |
154 | + g_videoline++; | |
155 | + if (262<=g_videoline) g_videoline=0; | |
156 | + /* Acknowledge interrupts */ | |
157 | + LPC_SCT->EVFLAG = status; | |
158 | +} | |
159 | + |
@@ -0,0 +1,19 @@ | ||
1 | + | |
2 | +extern volatile unsigned char vram[768]; | |
3 | +extern const unsigned char cgrom[]; | |
4 | + | |
5 | +void ntsc_init(void); | |
6 | +volatile int g_videoline; | |
7 | + | |
8 | +inline void check_ps2(void); | |
9 | +inline void completed_ps2(void); | |
10 | +inline void allow_ps2(void); | |
11 | +inline void disallow_ps2(void); | |
12 | + | |
13 | +void uart_init(void); | |
14 | +inline void check_rxdata(void); | |
15 | +inline void UARTSend(unsigned char code); | |
16 | +inline void check_txdata(void); | |
17 | + | |
18 | +inline void blink_cursor(void); | |
19 | +inline void print_char(unsigned char ascii); |
@@ -0,0 +1,144 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +#include "LPC8xx.h" | |
9 | + | |
10 | +#include "./prototypes.h" | |
11 | +#include "./config.h" | |
12 | + | |
13 | +// Prototype | |
14 | +const unsigned char ps2table[]; | |
15 | + | |
16 | +static int g_ps2clk=1; | |
17 | +static int g_ps2dat=0; | |
18 | + | |
19 | +inline void allow_ps2(void){ | |
20 | + // Allow the signal from PS/2 keyboard | |
21 | + LPC_GPIO_PORT->DIR0 &= ~(1<<5); // PIO0_5: input | |
22 | +} | |
23 | +inline void disallow_ps2(void){ | |
24 | + // Disallow the signal from PS/2 keyboard | |
25 | + LPC_GPIO_PORT->DIR0 |= (1<<5); // PIO0_5: output | |
26 | + LPC_GPIO_PORT->CLR0 = (1<<5); // Output L | |
27 | + g_ps2dat=0; | |
28 | +} | |
29 | +inline void check_ps2(void){ | |
30 | + // This function must be the most simple. | |
31 | + int ps2clk = LPC_GPIO_PORT->PIN0 & (1<<5); // Check P0.5 | |
32 | + if (g_ps2clk) { // When the signal just before reading P0.5 is H | |
33 | + if (!ps2clk) { // and the signal of P0.5 is L. | |
34 | + // Shift-right the data | |
35 | + g_ps2dat=g_ps2dat>>1; | |
36 | + // Data comes from P0.1. | |
37 | + // Note that data is inversed to have first bit of H. | |
38 | + g_ps2dat|=(LPC_GPIO_PORT->PIN0 & (1<<1)) ? 0:(1<<10); | |
39 | + } | |
40 | + } | |
41 | + g_ps2clk=ps2clk; | |
42 | +} | |
43 | +inline void completed_ps2(void){ | |
44 | + static int counter=0; | |
45 | + static int breakcode=0; | |
46 | + static int shiftkey=0; | |
47 | + unsigned char data,ascii; | |
48 | + if (g_ps2dat & 1) { | |
49 | + // 11 bit data are all received. | |
50 | + // Note that data is inversed (see check_ps2() function). | |
51 | + data=((~g_ps2dat)>>1)&0xff; | |
52 | + g_ps2dat=0; | |
53 | + ascii=0; | |
54 | + switch(data){ | |
55 | + case 0xf0: // Break code | |
56 | + breakcode=1; | |
57 | + break; | |
58 | + case 0xe0: // Extension (ignore it here) | |
59 | + break; | |
60 | + case 0x12: case 0x59: // Shift key | |
61 | + if (breakcode) shiftkey=0; | |
62 | + else shiftkey=0x80; | |
63 | + breakcode=0; | |
64 | + break; | |
65 | + default: | |
66 | + if (0x7f<data) break; | |
67 | + ascii=ps2table[shiftkey+data]; | |
68 | + break; | |
69 | + } | |
70 | + if (ascii) { | |
71 | + if (breakcode) { | |
72 | + breakcode=0; | |
73 | + } else { | |
74 | + // Valid ascii code was received. | |
75 | + //print_char(ascii); | |
76 | + UARTSend(ascii); | |
77 | + } | |
78 | + } | |
79 | + } | |
80 | + if (g_ps2dat) { | |
81 | + // When receiving data, run the counter. | |
82 | + counter++; | |
83 | + if (counter & (1<<6)) { | |
84 | + // Data is invalid when counter reaches certain value. | |
85 | + // Counter must be less than 8 according to PS/2 and NTSC signal speeds. | |
86 | + counter=0; | |
87 | + g_ps2dat=0; | |
88 | + } | |
89 | + } else { | |
90 | + // When there is no data, reset counter. | |
91 | + counter=0; | |
92 | + } | |
93 | +} | |
94 | + | |
95 | + | |
96 | +/* | |
97 | + * PS/2 -> ASCII data conversion table. | |
98 | + * 101 and 106 keyboards are supported. | |
99 | + */ | |
100 | +const unsigned char ps2table[]={ | |
101 | +#ifdef KEYBOARD101 | |
102 | + // 101 | |
103 | + // Shift key up | |
104 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x60,0x00, | |
105 | + 0x00,0x00,0x00,0x00,0x00,0x71,0x31,0x00,0x00,0x00,0x7a,0x73,0x61,0x77,0x32,0x00, | |
106 | + 0x00,0x63,0x78,0x64,0x65,0x34,0x33,0x00,0x00,0x20,0x76,0x66,0x74,0x72,0x35,0x00, | |
107 | + 0x00,0x6e,0x62,0x68,0x67,0x79,0x36,0x00,0x00,0x00,0x6d,0x6a,0x75,0x37,0x38,0x00, | |
108 | + 0x00,0x2c,0x6b,0x69,0x6f,0x30,0x39,0x00,0x00,0x2e,0x2f,0x6c,0x3b,0x70,0x2d,0x00, | |
109 | + 0x00,0x00,0x27,0x00,0x5b,0x3d,0x00,0x00,0x00,0x00,0x0a,0x5d,0x00,0x5c,0x00,0x00, | |
110 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x00, | |
111 | + 0x00,0x7f,0x14,0x00,0x13,0x12,0x1b,0x00,0x00,0x2b,0x00,0x2d,0x2a,0x00,0x00,0x00, | |
112 | + // Shift key down | |
113 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x7e,0x00, | |
114 | + 0x00,0x00,0x00,0x00,0x00,0x51,0x21,0x00,0x00,0x00,0x5a,0x53,0x41,0x57,0x40,0x00, | |
115 | + 0x00,0x43,0x58,0x44,0x45,0x24,0x23,0x00,0x00,0x20,0x56,0x46,0x54,0x52,0x25,0x00, | |
116 | + 0x00,0x4e,0x42,0x48,0x47,0x59,0x5e,0x00,0x00,0x00,0x4d,0x4a,0x55,0x26,0x2a,0x00, | |
117 | + 0x00,0x3c,0x4b,0x49,0x4f,0x29,0x28,0x00,0x00,0x3e,0x3f,0x4c,0x3a,0x50,0x5f,0x00, | |
118 | + 0x00,0x00,0x22,0x00,0x7b,0x2b,0x00,0x00,0x00,0x00,0x0a,0x7d,0x00,0x7c,0x00,0x00, | |
119 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x00, | |
120 | + 0x00,0x7f,0x14,0x00,0x13,0x12,0x1b,0x00,0x00,0x2b,0x00,0x2d,0x2a,0x00,0x00,0x00, | |
121 | +#endif | |
122 | +#ifdef KEYBOARD106 | |
123 | + // 106 | |
124 | + // Shift key up | |
125 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x60,0x00, | |
126 | + 0x00,0x00,0x00,0x00,0x00,0x71,0x31,0x00,0x00,0x00,0x7a,0x73,0x61,0x77,0x32,0x00, | |
127 | + 0x00,0x63,0x78,0x64,0x65,0x34,0x33,0x00,0x00,0x20,0x76,0x66,0x74,0x72,0x35,0x00, | |
128 | + 0x00,0x6e,0x62,0x68,0x67,0x79,0x36,0x00,0x00,0x00,0x6d,0x6a,0x75,0x37,0x38,0x00, | |
129 | + 0x00,0x2c,0x6b,0x69,0x6f,0x30,0x39,0x00,0x00,0x2e,0x2f,0x6c,0x3b,0x70,0x2d,0x00, | |
130 | + 0x00,0x00,0x3a,0x00,0x40,0x5e,0x00,0x00,0x00,0x00,0x0a,0x5b,0x00,0x5d,0x00,0x00, | |
131 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x00, | |
132 | + 0x00,0x7f,0x14,0x00,0x13,0x12,0x1b,0x00,0x00,0x2b,0x00,0x2d,0x2a,0x00,0x00,0x00, | |
133 | + // Shift key down | |
134 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x7e,0x00, | |
135 | + 0x00,0x00,0x00,0x00,0x00,0x51,0x21,0x00,0x00,0x00,0x5a,0x53,0x41,0x57,0x22,0x00, | |
136 | + 0x00,0x43,0x58,0x44,0x45,0x24,0x23,0x00,0x00,0x20,0x56,0x46,0x54,0x52,0x25,0x00, | |
137 | + 0x00,0x4e,0x42,0x48,0x47,0x59,0x26,0x00,0x00,0x00,0x4d,0x4a,0x55,0x27,0x28,0x00, | |
138 | + 0x00,0x3c,0x4b,0x49,0x4f,0x7e,0x29,0x00,0x00,0x3e,0x3f,0x4c,0x2b,0x50,0x3d,0x00, | |
139 | + 0x00,0x00,0x3a,0x00,0x60,0x5f,0x00,0x00,0x00,0x00,0x0a,0x7b,0x00,0x7d,0x00,0x00, | |
140 | + 0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x00, | |
141 | + 0x00,0x7f,0x14,0x00,0x13,0x12,0x1b,0x00,0x00,0x2b,0x00,0x2d,0x2a,0x00,0x00,0x00, | |
142 | +#endif | |
143 | +}; | |
144 | + |
@@ -0,0 +1,74 @@ | ||
1 | + | |
2 | +/* Generated by fzmparser version 2.5 --- DO NOT EDIT! */ | |
3 | + | |
4 | +/* Uses following resources: */ | |
5 | +/* 5 events, 1+1 states, 0 inputs, 1 outputs, 4+1 match regs, 0+0 capture regs */ | |
6 | + | |
7 | +#include "sct_fsm.h" | |
8 | + | |
9 | + | |
10 | +void sct_fsm_init (void) | |
11 | +{ | |
12 | +LPC_SCT->CONFIG = (LPC_SCT->CONFIG & ~0x00060001) | 0x00000000; /* SPLIT */ | |
13 | + | |
14 | +/* MATCH/CAPTURE registers */ | |
15 | +LPC_SCT->REGMODE_L = 0x0000; /* L: 4x MATCH, 0x CAPTURE, 1 unused */ | |
16 | +LPC_SCT->REGMODE_H = 0x0000; /* H: 1x MATCH, 0x CAPTURE, 4 unused */ | |
17 | +LPC_SCT->MATCH_L[0] = irqtiming; /* MATCH0 */ | |
18 | +LPC_SCT->MATCHREL_L[0] = irqtiming; | |
19 | +LPC_SCT->MATCH_L[1] = up1; /* MATCH1 */ | |
20 | +LPC_SCT->MATCHREL_L[1] = up1; | |
21 | +LPC_SCT->MATCH_L[2] = down2; /* MATCH2 */ | |
22 | +LPC_SCT->MATCHREL_L[2] = down2; | |
23 | +LPC_SCT->MATCH_L[3] = up3; /* MATCH3 */ | |
24 | +LPC_SCT->MATCHREL_L[3] = up3; | |
25 | +LPC_SCT->MATCH_H[0] = maxcount; /* MATCH4 */ | |
26 | +LPC_SCT->MATCHREL_H[0] = maxcount; | |
27 | + | |
28 | +/* OUTPUT registers */ | |
29 | +LPC_SCT->OUT[0].SET = 0x00000006; /* Output_pin_0 */ | |
30 | +LPC_SCT->OUT[0].CLR = 0x00000018; | |
31 | + /* Unused outputs must not be affected by any event */ | |
32 | +LPC_SCT->OUT[1].SET = 0; | |
33 | +LPC_SCT->OUT[1].CLR = 0; | |
34 | +LPC_SCT->OUT[2].SET = 0; | |
35 | +LPC_SCT->OUT[2].CLR = 0; | |
36 | +LPC_SCT->OUT[3].SET = 0; | |
37 | +LPC_SCT->OUT[3].CLR = 0; | |
38 | + | |
39 | +/* Conflict resolution register */ | |
40 | + | |
41 | +/* EVENT registers */ | |
42 | +LPC_SCT->EVENT[0].CTRL = 0x00005000; /* L: --> state L_ENTRY */ | |
43 | +LPC_SCT->EVENT[0].STATE = 0x00000001; | |
44 | +LPC_SCT->EVENT[1].CTRL = 0x00005003; /* L: --> state L_ENTRY */ | |
45 | +LPC_SCT->EVENT[1].STATE = 0x00000001; | |
46 | +LPC_SCT->EVENT[2].CTRL = 0x00005001; /* L: --> state L_ENTRY */ | |
47 | +LPC_SCT->EVENT[2].STATE = 0x00000001; | |
48 | +LPC_SCT->EVENT[3].CTRL = 0x00005002; /* L: --> state L_ENTRY */ | |
49 | +LPC_SCT->EVENT[3].STATE = 0x00000001; | |
50 | +LPC_SCT->EVENT[4].CTRL = 0x00005010; /* H: --> state H_ENTRY */ | |
51 | +LPC_SCT->EVENT[4].STATE = 0x00000001; | |
52 | + /* Unused events must not have any effect */ | |
53 | +LPC_SCT->EVENT[5].STATE = 0; | |
54 | + | |
55 | +/* STATE registers */ | |
56 | +LPC_SCT->STATE_L = 0; | |
57 | +LPC_SCT->STATE_H = 0; | |
58 | + | |
59 | +/* state names assignment: */ | |
60 | + /* State L 0: L_ENTRY */ | |
61 | + /* State H 0: H_ENTRY */ | |
62 | + | |
63 | +/* CORE registers */ | |
64 | +LPC_SCT->START_L = 0x0010; | |
65 | +LPC_SCT->STOP_L = 0x0001; | |
66 | +LPC_SCT->HALT_L = 0x0000; | |
67 | +LPC_SCT->LIMIT_L = 0x0001; | |
68 | +LPC_SCT->START_H = 0x0000; | |
69 | +LPC_SCT->STOP_H = 0x0000; | |
70 | +LPC_SCT->HALT_H = 0x0000; | |
71 | +LPC_SCT->LIMIT_H = 0x0010; | |
72 | +LPC_SCT->EVEN = 0x00000001; | |
73 | + | |
74 | +} |
@@ -0,0 +1,26 @@ | ||
1 | +#ifndef __SCT_FSM_H__ | |
2 | +#define __SCT_FSM_H__ | |
3 | + | |
4 | +/* Generated by fzmparser version 2.5 --- DO NOT EDIT! */ | |
5 | + | |
6 | +#include "sct_user.h" | |
7 | + | |
8 | +extern void sct_fsm_init (void); | |
9 | + | |
10 | +/* macros for defining the mapping between IRQ and events */ | |
11 | +#define sct_fsm_IRQ_EVENT_SCT_IRQ (0) | |
12 | + | |
13 | +/* Output assignments (and their defaults if specified) */ | |
14 | +#define sct_fsm_OUTPUT_Output_pin_0 (0) | |
15 | + | |
16 | +#define sct_fsm_setOutputDefault() do {LPC_SCT->OUTPUT = (LPC_SCT->OUTPUT & ~0x00000000) | 0x00000000;} while(0) | |
17 | + | |
18 | + | |
19 | +/* Match register reload macro definitions */ | |
20 | +#define sct_fsm_reload_MATCH0(value) do {LPC_SCT->MATCHREL_L[0] = value;} while(0) | |
21 | +#define sct_fsm_reload_MATCH1(value) do {LPC_SCT->MATCHREL_L[1] = value;} while(0) | |
22 | +#define sct_fsm_reload_MATCH2(value) do {LPC_SCT->MATCHREL_L[2] = value;} while(0) | |
23 | +#define sct_fsm_reload_MATCH3(value) do {LPC_SCT->MATCHREL_L[3] = value;} while(0) | |
24 | +#define sct_fsm_reload_MATCH4(value) do {LPC_SCT->MATCHREL_H[0] = value;} while(0) | |
25 | + | |
26 | +#endif |
@@ -0,0 +1,10 @@ | ||
1 | +#ifndef __SCT_USER_H__ | |
2 | +#define __SCT_USER_H__ | |
3 | +#include "LPC8xx.h" | |
4 | + | |
5 | +#define down2 (953) | |
6 | +#define irqtiming (1805) | |
7 | +#define maxcount (1904) | |
8 | +#define up1 (69) | |
9 | +#define up3 (1022) | |
10 | +#endif |
@@ -0,0 +1,76 @@ | ||
1 | +/* | |
2 | + This program is provided under the LGPL license ver 2.1. | |
3 | + Written by Katsumi. | |
4 | + http://hp.vector.co.jp/authors/VA016157/ | |
5 | + kmorimatsu@users.sourceforge.jp | |
6 | +*/ | |
7 | + | |
8 | +#include "LPC8xx.h" | |
9 | +#include "./prototypes.h" | |
10 | + | |
11 | +#define TXBUFF_SIZE 16 | |
12 | +#define BAUDRATE 9600 | |
13 | +#define SYSCLK 24000000 | |
14 | +#define DATA_LENG_8 (1<<2) | |
15 | +#define PARITY_NONE (0<<4) | |
16 | +#define STOP_BIT_1 (0<<6) | |
17 | +#define CTS_DELTA (1<<5) | |
18 | +#define DELTA_RXBRK (1<<11) | |
19 | +#define TXRDY (1<<2) | |
20 | +#define RXRDY (1<<0) | |
21 | +#define UART_BRG (SYSCLK/16/BAUDRATE-1) | |
22 | +#define UART_FRGDIV (0xff) | |
23 | + | |
24 | +void uart_init(){ | |
25 | + // Clock control | |
26 | + LPC_SYSCON->UARTCLKDIV = 1; // divided by 1 | |
27 | + NVIC_DisableIRQ(UART0_IRQn); // Do not use interrupt | |
28 | + LPC_SYSCON->SYSAHBCLKCTRL |= (1<<14); // Enable UART clock | |
29 | + LPC_SYSCON->PRESETCTRL &= ~(0x1<<3); // Reset UART | |
30 | + LPC_SYSCON->PRESETCTRL |= (0x1<<3); // Clear reset | |
31 | + // Initialize UART | |
32 | + LPC_USART0->CFG = DATA_LENG_8|PARITY_NONE|STOP_BIT_1; // 8 bits, no Parity, 1 Stop bit | |
33 | + LPC_USART0->BRG = UART_BRG; | |
34 | + LPC_SYSCON->UARTFRGDIV = UART_FRGDIV; | |
35 | + LPC_SYSCON->UARTFRGMULT = (((SYSCLK / 16) * (UART_FRGDIV + 1)) / (BAUDRATE * (UART_BRG + 1))) - (UART_FRGDIV + 1); | |
36 | + LPC_USART0->STAT = CTS_DELTA | DELTA_RXBRK; // Clear all status bits. | |
37 | + LPC_USART0->CFG |= (1<<0); | |
38 | +} | |
39 | + | |
40 | +unsigned char g_rxbuff[TXBUFF_SIZE]; | |
41 | +int g_rxbuff_read=0; | |
42 | +int g_rxbuff_write=0; | |
43 | + | |
44 | +inline void send_txdata(unsigned char code){ | |
45 | + g_rxbuff[g_rxbuff_write]=code; | |
46 | + g_rxbuff_write++; | |
47 | + g_rxbuff_write &= TXBUFF_SIZE-1; | |
48 | +} | |
49 | + | |
50 | +inline void check_txdata(void){ | |
51 | + if (g_rxbuff_read!=g_rxbuff_write) { | |
52 | + if (LPC_USART0->STAT & TXRDY) { | |
53 | + LPC_USART0->TXDATA = g_rxbuff[g_rxbuff_read]; | |
54 | + g_rxbuff_read++; | |
55 | + g_rxbuff_read &= TXBUFF_SIZE-1; | |
56 | + } | |
57 | + } | |
58 | +} | |
59 | + | |
60 | +inline void UARTSend(unsigned char code){ | |
61 | + // Convert ascii code to telnet code. | |
62 | + switch(code){ | |
63 | + case 0x0a: // LF to CRLF conversion. | |
64 | + send_txdata(0x0d); | |
65 | + break; | |
66 | + } | |
67 | + send_txdata(code); | |
68 | +} | |
69 | + | |
70 | +inline void check_rxdata(){ | |
71 | + if (LPC_USART0->STAT & RXRDY) { | |
72 | + unsigned char rxdata=LPC_USART0->RXDATA; | |
73 | + // TODO: conversion from telnet code to ascii code. | |
74 | + print_char(rxdata); | |
75 | + } | |
76 | +} |